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לפני 2 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for an experienced Electronics Engineer to join our growing R&D Hardware team and lead and deliver Hardware projects.
A day in the life and how youll make an impact:
Architect and develop electrical modules from concept through production, including PCB design for new systems and continuous improvement of existing ones.
Bring new components and sensors into product line, working across power supply, communication protocols (I2C, Ethernet, UART), and supporting modules
Serve as the go-to expert for diagnosing and resolving complex electrical faults - you set the standard for root-cause problem-solving.
Partner closely with systems engineers, mechanical engineers, and software teams to shape next-generation features and products from the ground up.
Manage subcontractor relationships for end-to-end module delivery, ensuring quality and timelines stay on track.
Requirements:
BSc in Electrical Engineering or equivalent.
5+ years of experience as an Electrical engineer in a multidisciplinary company.
Proficiency in electronic circuit board design and development.
Proven experience in integrating new components into the system, including
power supply, communication (I2C, Ethernet, UART), and other supporting modules.
Experience in end-to-end module ownership, including work with subcontractors.
Experience working with programmable logic array modules.
Experience with development SW. (Altium advantage)
Experience with experiments and jig design
Highly motivated, determined, and a team player.
Able to own lead and deliver with a proactive approach.
Readiness to work in a challenging startup environment.
This position is open to all candidates.
 
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01/10/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a highly motivated and experienced Senior System Engineer to join our team and lead the development of sophisticated solutions that push the boundaries of flight.

Responsibilities:

Lead the development of innovative and complex airborne systems.
Develop system requirements that meet customer requirements and product definitions provided by other departments.
Facilitate PMO on developing integration plans identifying timelines, resources and equipment requirements to integrate engineering designs into higher level products.
Define and lead system level test plans to validate that the engineering designs meet requirements.
Collaborate with the R&D and Line of Business managers to ensure timely project delivery.
Define and lead experiments, tests and studies, and/or analytical investigations and provide clear and meaningful results and analysis.
Compile and assist in the presentation of test data collected during design validations to a peer group of engineers.
Work in collaboration with a multi-disciplined engineering team to develop engineering designs/solutions from initial POC to onsite customer implementation.
Contribute to documentation for use in the manufacture, installation, technical support and training related to the final design.
Support engineering products through entire life cycle including assist in installation at customer site, assist in product upgrades and improvements, support of service escalations and product EOL.
Provide regular status of projects to leadership.
Requirements:
B.Sc in engineering UAV related field (Mechanical, Aerospace, Electrical Engineering, or similar).
6 years project management of engineering/development projects.
2 years experience in design and project management of UAVs, or systems of similar complexity.
2 years experience designing and releasing parts for fabrication and mass production.
Experience with aircraft design, performance analysis, and/or construction.
Experience in deriving SW & HW requirements from product initiatives.
Experience creating production quality engineering documentation.
Experience creating and executing schedules in Jira, Microsoft Project, or similar.
Experience with Gated design development (PDR, CDR).
Strong people and communication skills.
Able to work cooperatively on a team.
This position is open to all candidates.
 
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17/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.

This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.

Responsibilities

Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.
Requirements:
3+ years of experience in FPGA design and digital system development.
Strong proficiency in Verilog/SystemVerilog RTL design.
Hands-on experience with Xilinx FPGA families (UltraScale+, Zynq, or Versal).
Experience implementing and debugging high-speed interfaces (PCIe, Ethernet, JESD, or similar).
Solid understanding of FPGA development flows, including synthesis, place & route, and timing closure.
Experience with lab debugging tools (e.g., ILA/ChipScope, oscilloscopes, logic analyzers).
Experience with simulation and verification methodologies (RTL and gate-level).
Strong problem-solving skills and attention to detail.
B.Sc. or higher in Electrical Engineering, Computer Engineering, or equivalent.
Strong communication skills and ability to collaborate across teams.
This position is open to all candidates.
 
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08/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are seeking an experienced HW Team Leader to drive the engineering efforts behind our electronic systems. This role will focus on enhancing the testability, production efficiency, and quality of our products by defining Design for Testability (DFT) strategies, developing production test solutions, and leading failures investigation and correction.
What You'll Do:
Lead and mentor a team of highly skilled hardware engineers.
Drive execution in a fast-paced, multi-project environment.
Own and evolve our Design for Testability (DFT) strategy and guidelines.
Lead end-to-end development of production test solutions and test facilities.
Drive root-cause investigations, failure analysis, and product improvement initiatives.
Collaborate closely with R&D, manufacturing, and quality teams to ensure product reliability and production readiness.
Requirements:
B.Sc. or M.Sc. in Electrical Engineering, Electronics Engineering, or a related field. - Must
5+ years of leadership experience in Hardware Engineering, System Design, or Product Engineering.-Must
Strong experience with board design and complex multidisciplinary systems.- Must
Deep understanding of DFT methodologies and production test strategies.
Hands-on experience with debugging, failure analysis, and lab equipment.
Strong leadership, communication, and problem-solving skills.
Ways to stand out:
Experience with automated test equipment (ATE).
Scripting and automation experience (Python, LabVIEW, etc.).
Knowledge in FPGA Design and Verilog coding.
This position is open to all candidates.
 
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30/09/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are seeking a passionate QA Engineer to join our FW testing team. This position will be part of our growing team, helping NVIDIA products meet industry-leading benchmarks for efficiency and quality. As a Firmware QA Engineer, you will be immersed in the latest advancements and actively contribute to developing world-class products. Your efforts will directly impact the performance and quality of our offerings, ensuring they consistently meet industry-leading standards.


We are looking for ideal candidates who will actively test industry-leading features in the FW sector, quickly learn new features, conduct both manual and automated testing, and contribute to the development of automation systems.


What you'll be doing:
Review arch design and requirements documents for new features introduced in the Nvlink program.
Join the effort of QA shift left towards simulation for NVL7 generation.
Design, develop, and perform tests for the new features, as part of FW GA or update releases.
Automate newly added tests in the existing automation framework, and add new capabilities and features to the framework.
Report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by R&D team, and raise if not fixed.
Fully collaborate with different external teams like : :product marketing, R&D, and verification.
Define and build setups topologies for appropriate product coverage.
Requirements:
What we need to see:
Practical / BSc in Computer Science or Electrical/Electronics Engineering.
0-3 years of proven experience.
Clear verbal and written communication, proficient in written and spoken English.
Self-reliant individual, capable of planning and carrying out tasks within their assigned area.
Personal: good interpersonal skills, quick learner, proactive, innovative, highly motivated, and committed.

Ways to stand out from the crowd:
Scripting skills and proven experience in Python or other programming languages.
Proven experience in QA - methodologies, and test design.
Working in a fast-paced environment with multiple parallel running activities.
Knowledge/experience in Networking protocols.
Knowledge of Linux/Windows OS.
This position is open to all candidates.
 
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08/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for control systems.
Responsibilities:
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.
Requirements:
3+ years of experience in FPGA design and digital system development.
Strong proficiency in Verilog/SystemVerilog RTL design.
Hands-on experience with Xilinx FPGA families (UltraScale+, Zynq, or Versal).
Experience implementing and debugging high-speed interfaces (PCIe, Ethernet, JESD, or similar).
Solid understanding of FPGA development flows, including synthesis, place & route, and timing closure.
Experience with lab debugging tools (e.g., ILA/ChipScope, oscilloscopes, logic analyzers).
Experience with simulation and verification methodologies (RTL and gate-level).
Strong problem-solving skills and attention to detail.
B.Sc. or higher in Electrical Engineering, Computer Engineering, or equivalent.
Strong communication skills and ability to collaborate across teams.
Advantages:
Experience with Versal architecture, including NoC design and integration.
Background in ASIC design or verification.
Familiarity with FPGA backend flows and static timing analysis (STA).
Scripting experience (Python, TCL, Makefile) and/or C/C++ knowledge
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior DDR Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing. You will verify digital designs, collaborate closely with colleagues on projects, and perform direct validation. You will construct testbenches that exercise hardware through corner-cases and expose bugs. You will manage the full life-cycle from planning and execution to closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
Experience with verification techniques, and the full verification life cycle.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience with performance verification of ASICs and ASIC components.
Experience in DDR PHY/Controller verification activities.
Experience in DDR SoC integration and verification.
This position is open to all candidates.
 
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17/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking an experienced Team Leader to lead our Failure Analysis engineering group within the Product Engineering team. You will be responsible for controlling and improving the quality of our hardware products through technical leadership, data-driven insights, and global production support. This role requires deep expertise in electronics systems, failure methodologies, production process control, and proven leadership capabilities across multiple geographies.



Key Responsibilities

Lead, mentor, and develop a team of failure analysis engineers while providing technical guidance on complex hardware issues.
Drive continuous improvement of quality KPIs through root cause analysis (RCA), statistical analysis, and yield optimization across all products.
Establish and implement standardized failure analysis methodologies, debug protocols, and quality control processes across global production sites.
Serve as the technical focal point for product design and functionality, supporting the team across RF, embedded, FPGA, high-speed communication, and mixed-signal systems.
Collaborate across Design, Manufacturing, Supply Chain, and Sales teams to resolve critical issues and prevent yield impact.
Manage vendor/supplier escalations and conduct design DFT/DFM (Design for Test/Manufacturability) analyses.
Lead investigation of production crises and manage critical path issues under time pressure.
Requirements:
6+ years in hardware design and failure analysis; minimum 2 years in a leadership role- Must.
Deep understanding of electronics production processes, DFT principles, and manufacturing constraints- Must.
Strong hands-on lab expertise: proficiency with oscilloscopes, logic analyzers, VNA, and automated test equipment-Must.
Demonstrated experience with production testing workflows, yield analysis, and statistical process control.
Proven ability to conduct systematic root cause analysis and communicate findings to senior management.
Excellent cross-functional collaboration and technical communication skills.
Bachelor's degree in Electronics Engineering or equivalent.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Responsibilities:
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
8 years of experience in technical leadership.
Experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Experience developing RTL for ASIC subsystems.
Preferred qualifications:
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in TCP, IP, Ethernet, PCIE and DRAM including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Expert IC Package Design Lead to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.

As an Expert IC Package Design Lead, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon.
You will own package flow, architecture, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for defining package technologies that meet aggressive electrical, thermal, mechanical, and cost targets, enabling our products to operate reliably in the worlds most demanding AI and cloud environments.

Key Responsibilities
Own end-to-end IC package design, from early architecture and feasibility through detailed design, qualification, and high-volume manufacturing.
Define package architecture and technology selection (organic substrates, advanced laminate, interposers, multi-die/chiplet packaging, CoWoS - 2.5D/3D integration).
Lead signal integrity (SI), power integrity (PI), and thermal considerations at the package level for high-speed, high-power devices.
Drive package layout, substrate routing, bump/ball maps, stack-ups, materials selection, and mechanical constraints.
Collaborate closely with silicon design, SerDes, system, SI/PI, and reliability teams to optimize overall product performance.
Interface with OSATs, substrate vendors, and manufacturing partners to ensure design-for-manufacturability (DFM), yield, and cost targets.
Lead package-related risk assessment, failure analysis, and corrective actions during bring-up and production ramp.
Support NPI, qualification, and product sustainment activities, including vendor audits and technical reviews.
Requirements:
Basic Qualifications
10+ years of hands-on IC BIG package design experience for high-performance semiconductor products, with full ownership from concept through tape-out.
Expert proficiency in IC package design tools (Cadence APD / SiP or equivalent) and experience designing complex packages (BGA, FCBGA, FCCSP).
Strong package architecture & integration expertise, including stack-ups, ball/bump maps, constraints, SMT integration, and package BOM ownership.
Deep understanding of signal, power, and thermal integrity at the package level, with ability to drive design tradeoffs based on analysis.
Proven manufacturing and release experience, including DRC/LVS/DFM, OSAT engagement, and delivering production-ready package designs.

Preferred Qualifications
Experience with AI, networking, PCIe, CXL, or other high-speed data center interfaces.
Familiarity with package reliability standards and qualification (JEDEC, IPC, thermal cycling, HTOL, etc.).
Experience supporting chiplet-based architectures and heterogeneous integration.
Prior technical leadership or package ownership on high-volume products.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time
In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.

You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.

Responsibilities:
As a member of the Package Design team, you will:

Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing support.

Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.

Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.

Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.

Assist in developing and improving package design methodologies, flows, and best practices.

Contribute to debugging, issue resolution, and package bring‑up activities as needed.
Requirements:
Bachelors degree in Electrical Engineering or a related field.

5+ years of experience in package, PCB, or high‑speed design engineering.

Strong understanding of high-speed signal design and power distribution networks (PDN).

Familiarity with industry-standard EDA tools for layout and design.

Strong communication skills with the ability to collaborate and coordinate effectively with cross-functional teams
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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