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Our team at the Huawei Computing Network Innovation Lab is looking for exceptional talent to join us and lead the development of next-generation data centers. We create cutting-edge technologies that synergize software and hardware in tandem to accelerate compute, storage, and networking at large scale. We aim to drive innovation and deliver software-defined infrastructure and algorithms for HPC, AI/ML, and Big Data applications.
We are looking for an outstanding Research Team Lead with deep hands-on expertise in large-scale distributed systems, AI framework infrastructure, and performance optimization on custom accelerators. If you are a visionary technical leader, a skilled communicator, and a team builder who thrives at the frontier of systems and AI research - you're welcome on board.

What Will You Be Doing?
Lead and grow a world-class team of researchers and engineers working on distributed AI infrastructure and systems software.
Architect and own the software infrastructure enabling distributed training and inference on Huawei's custom accelerator hardware (e.g., Ascend NPU).
Drive research and development on communication libraries, runtime systems, memory management, and graph execution & synchronization at scale.
Optimize end-to-end performance across large-scale clusters, covering both scale-up (multi-device) and scale-out (multi-node) configurations.
Design and implement high-performance communication backends and collective operations (AllReduce, AllGather, broadcast) for distributed training workloads.
Collaborate cross-functionally with hardware architects, compiler teams, and framework engineers to co-design hardware-software solutions.
Publish and present research findings at top international venues (NeurIPS, EuroSys, SC, MLSys, OSDI) and represent the team externally.
Mentor engineers and researchers, conduct performance and growth reviews, and shape team culture and technical direction.
Partner with top academic institutions and open-source communities to advance the state of the art in distributed AI systems.

Required Software Engineer
Job Description Summary
As a Software Engineer - PET Data Acquisition, you will join a highly specialized team developing the real-time software stack at the core of our PET/CT imaging systems.
Our software directly impacts image quality and system reliability, enabling clinicians worldwide to provide accurate diagnoses and life-saving care.
You will work on a distributed, high-performance C++ system running on Linux, responsible for configuring detector hardware, processing high-throughput data streams, and enabling seamless integration across the scanner ecosystem.
About the Team:
Our team develops the data acquisition platform powering our PET/CT scanners.
This system:
Configures and interfaces with detector hardware
Receives high-rate event streams via UDP
Performs real-time sorting and time-stamping of coincidence events
Manages acquisition state and persistence
Exposes control and monitoring APIs to clinical applications
The platform is a distributed, multi-process, multi-threaded C++ system running on Linux, designed for deterministic, high-performance operation under demanding workloads.
Key Responsibilities
Design and develop end-to-end data acquisition features, from low-level UDP capture and event processing through service layers and client APIs
Optimize and maintain performance-critical code paths, including:
Lock-free / low-contention data structures
Thread affinity and NUMA optimization
Zero-copy buffer management
Deterministic real-time execution
Enhance and maintain inter-process communication mechanisms, including shared memory, message queues, and service interfaces
Work with embedded persistence layers (SQL-based) for configuration, metadata, and runtime state
Collaborate closely with hardware, physics, and system teams to integrate new detector and system components
Develop unit and integration tests, and actively participate in code and design reviews
Troubleshoot complex cross-process issues using advanced debugging and profiling tools (e.g., gdb, perf, tcpdump, strace).

As a Software Development Engineer in Test on our team, you will own the quality of Nitro card embedded software and firmware. You will design, develop, and maintain test automation for embedded systems and components, covering hardware interface verification, real-time firmware behavior validation, firmware update integrity, and fleet-scale deployment confidence. You will collaborate closely with firmware development teams to troubleshoot complex system-level problems at the hardware-software boundary and ensure timely delivery of high-quality Nitro card software to AWS Cloud solutions.

Key job responsibilities
- Own the firmware test automation framework - architect, develop, and extend a Python-based validation solution that scales across multiple Nitro card generations and hardware platforms, automating test coverage across the full firmware stack from boot sequences through board management layers and card-level system integration.
- Design and implement traceable, specification-driven test cases that validate firmware functional correctness, fault tolerance, and performance across hardware components, communication interfaces, and cross-subsystem interactions.
- Optimize CI/CD pipelines by integrating pre-merge and post-merge firmware validation, defining trigger policies per hardware generation, enforcing coding-standard compliance, and reducing commit-to-validated cycle time.
- Troubleshoot complex embedded system failures by analyzing firmware logs, system traces, and hardware diagnostics, then translate field incidents into targeted regression suites that prevent recurrence.
- Collaborate with firmware and hardware teams during new-generation silicon bring-up, define test plans, drive quality gates for production release, and mentor teammates on testing best practices and system architecture.

A day in the life
You start your morning reviewing overnight CI results and triaging any firmware validation failures flagged across active Nitro card generations. Mid-morning, you pair with a firmware engineer to debug a boot-sequence regression discovered during pre-merge testing, using hardware-in-the-loop test benches and system traces. After lunch, you join a design review for a next-generation Nitro card, providing input on testability and proposing validation strategies for new subsystem interfaces. Later, you refine your test framework to improve coverage for a recently released feature, then wrap up by sharing your findings in a team knowledge-sharing session.

we are an agile defense-tech startup tackling the most complex challenges in counter-drone and uncrewed defense. With hundreds of combat-proven systems deployed by the IDF and global partners, we are now engineering the next generation of C-UxS (Counter-Uncrewed Systems). We leverage advanced electronic warfare and kinetic measures to detect and neutralize hostile threats. If you want to push technological boundaries while safeguarding Israel and our allies, join us at this pivotal stage of our growth.
This is a unique opportunity to join a company at a pivotal growth stage and help shape its products, culture, and future.
We are seeking a highly skilled C++ Software Engineer to join our fast-paced startup team. In this role you will join a high-performance, robust C++ software development team, with opportunities to contribute in Python for tooling, prototyping, and data processing. You will work on algorithmic challenges spanning GNSS, signal processing, computer vision, and geospatial data.
Responsibilities
Design and implement high-performance C++ software, with emphasis on real-time, efficient, and reliable code.
Develop and optimize algorithms related to GNSS, signal processing and geospatial analysis.
Use Python for prototyping, automation, and analysis tools.
Collaborate with cross-functional teams including hardware, research, and product.

we are an agile defense-tech startup tackling the most complex challenges in counter-drone and unscrewed defense. With hundreds of combat-proven systems deployed by the IDF and global partners, we are now engineering the next generation of C-UxS (Counter-Uncrewed Systems). We leverage advanced electronic warfare and kinetic measures to detect and neutralize hostile threats. If you want to push technological boundaries while safeguarding Israel and our allies, join us at this pivotal stage of our growth.
This is a unique opportunity to join a company at a pivotal growth stage and help shape its products, culture, and future.
We are seeking a highly experienced and hands-on Drone Technology Researcher to lead a specialized, agile research team. This role is critical to our mission of staying ahead of emerging drone threats. Your team will focus strictly on the electronic and signal aspects of drones-specifically communication protocols, flight controllers, and GNSS systems-rather than their electro-mechanical or aerodynamic properties.
Your primary objective will be to deconstruct, study, and understand modern drone technologies to empower our Electronic Warfare (EW) R&D team with actionable insights for drone detection, jamming, and spoofing. You will manage daily operations, track progress, build non-standard test platforms, and maintain a priority-based threat intelligence matrix.
Key Responsibilities:
● Lead and mentor a small team of junior researchers. Assign tasks, manage ongoing lab/field activities, and track research progress to ensure milestones are met efficiently.
● Build non-standard drones using custom or off-the-shelf components. Conduct rigorous lab and field tests to study their electronic behavior under various conditions.
●Perform deep dives into drone communication protocols (RF links, Wi-Fi, proprietary telemetry), flight controller firmware, and GNSS navigation systems to identify vulnerabilities and operational mechanics.
● Translate technical findings into practical, actionable insights for the EW R&D team to improve our counter-drone capabilities (detection, RF jamming, and GPS/GNSS spoofing).
● Continuously monitor the internet, forums, dark webs, and tech spaces for emerging drone technologies, DIY trends, and evolving tactics.
● Maintain a continuously updated, priority-based "drone threat list." Create detailed, evidence-based reports on new technologies with clearly cited sources, and confidently present these findings across the company.

We are looking for an Embedded Software Engineer to join the SW group and take a major part in redefining the future of AWS cloud.

Were searching for engineers with a passion for networking to develop SRD (Scalable Reliable Datagram). SRD is a high-performance, low-latency transport protocol used within our Web Services infrastructure to optimize network performance. SRD powers several high-impact, cutting-edge products, including on-demand ML and HPC platforms leveraging EFA, next-generation storage services built on EBS, and the future of AWS network traffic.

Key job responsibilities
As an Embedded Software Engineer on the SRD team, your primary responsibility will be to develop and optimize SRD technology across AWSs network infrastructure. You will work on cutting-edge, high-performance platforms that power ML, HPC, and storage-intensive workloads.

Your role will involve designing, deploying, and maintaining the SRD codebase, ensuring its reliability and scalability to meet the demands of diverse applications. You will gain in-depth knowledge of the various platforms and services running SRD within AWS, diving deep to understand their unique challenges and complexities.

Collaboration will be key, as you will work across multiple teams at different layers of the software stack. You will also contribute to defining new hardware modules and enabling offloads to enhance performance.

*Part-Time or Full-Time Opportunity

In this job opening, we are seeking a highly motivated and visionary researcher to join our team focused on chiplet-based computing systems. This role involves research and development in chiplet-based architectures, aiming to overcome performance and scalability limits of traditional compute platforms.

Responsibilities:
Conduct cutting-edge research on the co-design of communication and computation for wafer-scale systems. On the communication side, the work focuses on architecting Networks-on-Chip, providing scalable, high-bandwidth, and ultra-low-latency interconnects that efficiently span multiple dies and support fine-grained data movement. On the computation side, the research emphasizes optimizing and mapping training and inference workloads to fully exploit wafer-scale resources, improving performance, scalability, and energy efficiency through intelligent task placement and scheduling.
Investigate various aspects of system design, including:
Network-on-Chip design, further including Topology exploration, routing algorithms, and protocol/flow-control design to support high-throughput collective communication, low-latency synchronization, and efficient model/data parallelism
Expressing and Mapping LLM Parallelism to Wafer-Scale System that simplify LLM parallelism (e.g., tensor, pipeline, and data parallelism) and efficiently map training and inference workloads onto wafer-scale system

We are forming a new team to explore AI Compilation Boundaries
This team will operate under a unique manner, as described below -
The environment
- Startup-like intensity
Small team
High ownership
High visibility
Merit is the essence, not titles
- Fast pace
Todays state of the art is tomorrows baseline
We aim to go beyond
- Incubator mindset
Take on hard challenges, dismantle, and regroup as novelty
- Elite technical culture
Strong experts
Strong standards
Strong execution.
Ratio beats seniority, not the other way around
- No artificial boundaries
We challenge assumptions, and question constraints, and leave no quarter
- Direct exposure to the latest and greatest AI technology
Real hardware
Real toolchains
Real large-scale AI applications
All pass through and impacted by our work
- First-principles thinking
out-of-the-box is a compromise
Do not accept that a box had to exist in the first place.

The Labs Security Team secures the firmware at the foundation of our custom silicon. We work on Graviton processors and the Nitro System - hardware that runs a substantial share of the world's cloud workloads - in close collaboration with the silicon architects and firmware developers who design it. Our engineers operate at the lowest levels of the stack: secure boot chains, hardware root of trust, attestation, cryptographic protocol design, and the boundaries between trust domains within the system.

Key job responsibilities
As a Security Engineer, you will threat model new silicon and firmware architectures, conduct low-level penetration testing against privileged and externally reachable interfaces, review designs and code across multiple firmware components, and build the fuzzing and analysis tooling that makes this work repeatable at silicon scale. You will also help raise the security bar across the wider organization through direct engagement with firmware and hardware teams. We are looking for engineers fluent in C and ARM assembly, with real depth in secure boot, applied cryptography, or embedded exploitation, and the technical credibility to hold a position in a room full of people who designed the system you are testing.