דרושים » חשמל ואלקטרוניקה » Communication PHY Algorithms Engineer

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

The System team defines and develops cutting-edge 5G technology. In this role, you will lead the system team responsible for defining our next-generation modem products and developing modem algorithms, working at the intersection of research, system design, and implementation.

Responsibilities

Lead a team of senior system and algorithm engineers responsible for developing innovative 5G modems.

Partner closely with VLSI and SW teams implementing the modem HW and SW and align on system definitions with implementation constraints.

Develop and maintain deep expertise in cellular standards and their implications for modem design.

Lead system and algorithmic research, balancing trade-offs between DSP/SW/HW implementations, performance, implementation cost, real-time constraints, and time-to-market.

Own system definitions, requirements, and implementation from initial research through simulation to official release, including MATLAB/C/C++/SystemC modeling and specification documentation.

Mentor and grow team members, fostering technical excellence and professional development.

Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
Key Responsibilities:
Lead complex, multi-system features and platforms from initial concept through design, implementation, and release.
Analyse, define, and debug complex system behaviours, state machines, algorithms, and event-response logic (including radio link budget considerations).
Define requirements and guide multi-disciplinary teams-spanning both our internal engineering groups (SW, HW, Modem, DSP, FPGA) and external vendors-through implementation, debugging, and integration.
Lead the integration of internal subsystems and optimize the integration of external vendor technologies.
Perform independent, hands-on debugging using Python or Matlab and log analysis tools.
Actively participate in, guide, and lead lab and field testing, validation, and system optimization both in the lab and in outdoor environments.

We are seeking a highly skilled and experienced multidisciplinary engineer with a strong background in system design to join our team. In this role, you will contribute to our upcoming projects and play a key part in the rapid expansion of the Ethernet market.
As a such, you will be responsible for developing high-speed digital and analog circuit boards used in Ethernet products. Your duties will include designing board schematics, overseeing PCB layout, and conducting lab . Additionally, you will be responsible for evaluating new hardware solutions, providing technical leadership in troubleshooting and reviewing schematics, layouts, and design for manufacturability (DFM), as well as managing components selection.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

We are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os.
Responsibilities:
Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.
Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.
Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues.
Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices.
Perform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis.
Utilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs.
Work closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process.
Develop behavioural models based on measured signal integrity data to inform future design and simulation work.
Conduct pre- and post-layout simulations and measurements for high-speed signal interfaces.

Were seeking passionate professionals who thrive in a fast-paced, creative, and collaborative environment - those who want to be part of the next generation of airspace security innovation.
This role is focused on designing, developing, and maintaining advanced automation solutions across unit, integration, system, and end-to-end testing levels.
The ideal candidate is a hands-on developer with strong expertise in Python and Pytest, experienced in building and executing automated tests, and comfortable working with modern CI/CD pipelines and automation tools.
The Senior Developer will act as a technical mentor and key contributor, ensuring best practices are followed and test automation is seamlessly embedded into the development lifecycle.
Key Responsibilities:
Develop and maintain automated RF test development tools using Python and other relevant programming languages.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze test results, generate comprehensive reports, and present findings to cross-functional teams.
Collaborate with hardware and software engineers to integrate automated RF testing into the product development cycle.
Stay current with emerging RF technologies and testing methodologies, proposing and implementing improvements to existing test processes.
Contribute to the development of RF testing strategies aligned with R&D goals and product roadmaps.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

Required Staff GPU Verification Engineer
Join our GPU Hardware Verification team in Raanana, Israel, and help shape the future of the world's most widely deployed GPU architecture - Mali. As a Staff Hardware Verification Engineer, you will play a key technical role in verifying advanced GPU components and subsystems, working alongside architects, designers and verification engineers to deliver high-quality, industry-leading graphics technology. You'll contribute to complex verification environments, solve challenging technical problems and help drive continuous improvements to our verification methodologies and flows.
Responsibilities:
Develop and execute verification plans for advanced GPU components and subsystems.
Develop and maintain AI tools, agents, and skills to support our engineering teams and workflows.
Build, maintain and enhance robust verification environments using SystemVerilog and UVM.
Apply coverage-driven, constrained-random and, where appropriate, formal verification techniques to achieve comprehensive functional coverage.
Debug complex functional issues and work closely with Design and Architecture teams to identify and resolve root causes.
Contribute to block-level and system-level verification, including environment integration and regression analysis.
Improve verification methodologies, automation, scripting and continuous integration flows to increase quality and efficiency.
Participate in verification reviews and support verification sign-off activities.
Share technical knowledge and collaborate with colleagues across the wider GPU engineering organisation.

We are seeking outstanding Electrical Engineering graduates from top universities to join our Electrical Compliance team and gain hands-on experience with cutting-edge networking technologies and best-in-class ASIC interfaces.
Responsibilities
Operate and maintain test equipment for compliance and validation processes.
Perform switch platform testing to ensure reliability and performance.
Work with advanced ASIC interfaces, including Ethernet, PCIe, USB, SPI, UART, I2C
Assist in troubleshooting and analysing electrical compliance issues.
Collaborate with senior engineers to improve testing methodologies.
Career Growth Opportunities
Gain real-world experience in compliance testing and hardware validation.
Learn from industry-leading engineers and expand your technical expertise.
Build skills in automation, data analysis, and advanced networking technologies that are highly valued in the industry.
What We Offer
Exposure to state-of-the-art networking technologies.
Opportunity to work on real-world compliance challenges.
Mentorship from industry experts.
Learn from the best and build the future of networking
Ready to launch your career? Apply now and start building the future with our company.
Please attach your gradesheet.