We are looking for a visionary Senior Technical Manager to build and lead our AI software stack for our next-generation NPU platform.
This is a rare opportunity to own the full software layer - from compiler infrastructure to developer ecosystem - and make a lasting impact on how AI runs on silicon.
What You'll Do;
Build and lead a highly skilled AI software & algorithms engineering team, establishing engineering standards, development processes, and technical direction
Define the end-to-end stack - compiler, runtime, kernel libraries, and SDK - enabling efficient AI deployment on our NPU
Drive AI compiler development using technologies like MLIR, TVM, LLVM or similar infrastructures to translate PyTorch/TensorFlow models into optimized NPU execution
Champion model optimization - quantization, pruning, and hardware-aware techniques for maximum performance and power efficiency on the accelerator.
Runtime, Drivers, and Firmware Integration - scheduling, memory management, and low-level software for AI workloads on-chip
AI Kernel Libraries - Guide the development of highly optimized neural network kernel libraries and performance-critical primitives tailored to the architecture of the NPU.
Developer Ecosystem - Define and deliver the SDK, APIs, and development tools that allow internal teams and external developers to deploy AI models easily on the platform.
Cross-Functional Architecture Collaboration - Work closely with silicon architecture and hardware design teams to ensure optimal hardware-software co-design, providing feedback on architecture, performance bottlenecks, and future ISA requirements.
Requirements: MSc or PhD in Computer Science, Electrical Engineering, or equivalent
10+ years in software development for complex systems (semiconductor or AI infrastructure preferred)
Proven track record leading engineering team delivering complex software platforms
Deep understanding of how machine learning models are mapped to hardware accelerators (NPUs, GPUs, DSPs, or FPGAs)
Deep understanding of how AI models (CNNs, Transformers, RNNs) are mapped onto hardware accelerators (NPUs, DSPs, or FPGAs)
Hands-on experience with AI compiler stacks: MLIR, LLVM, TVM, XLA, or similar
Solid background in systems software, including runtime environments, drivers, and performance-critical software
Experience building up a group of top-tier talent in the competitive AI space
Customer-facing experience with a partnership mindset
This position is open to all candidates.