We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

abra R&D is seeking a Verification Engineer. We are looking for a skilled Verification Engineer to join a professional and dynamic team and take part in advanced, diverse technology projects in the fields of FPGA Verification, signal processing, controllers, and more. This role requires extensive experience in Verification, UVM methodology, SystemVerilog, FPGA / ASIC verification environments, RTL debugging, simulation tools, scripting, and working closely with FPGA development, system, architecture, and algorithm teams. Key Responsibilities:
* Develop verification environments using UVM methodology for FPGA verification across various projects.
* Work on verification projects involving signal processing, controllers, and additional advanced technologies.
* Define, architect, and develop verification environments from block-level to full-chip level.
* Work closely with FPGA development teams, system engineers, architecture teams, and algorithm engineers.
* Support RTL debugging from block level to system level.

Required Senior DDR Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing. You will verify digital designs, collaborate closely with colleagues on projects, and perform direct validation. You will construct testbenches that exercise hardware through corner-cases and expose bugs. You will manage the full life-cycle from planning and execution to closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

we are a leading company specializing in the development and manufacturing of autonomous drone systems. Its solutions combine hardware, software, and AI-driven technologies to support complex, large-scale operations. our company works primarily with defense industries, such as military and law enforcement agencies worldwide. The company is part of Ondas Holdings and operates as a wholly owned subsidiary.
In this role, you will be part of the electronics engineering team responsible for leading projects end-to-end, including electronics design, drafting, design verification testing, collaboration with internal departments, external suppliers, and supporting development and production phases
Responsibilities
Planning, executing, and documenting verification & validation (V&V) tests for electronic circuits, assemblies, and multidisciplinary systems
Performing functional, electrical, environmental, and integration tests for airborne and ground electronic systems
Preparing, executing, and documenting ATP (Acceptance Test Procedure) and validation test documents
Operating laboratory equipment such as oscilloscopes, spectrum analyzers, signal generators, power supplies, multimeters, and data acquisition systems
Performing hands-on debugging and troubleshooting of electronic boards, communication interfaces, cables, and system-level failures
Supporting integration, bring-up, and verification activities throughout development and production stages
Writing detailed test reports, validation summaries, failure analyses, and technical documentation
Working closely with hardware, firmware, system engineering, integration, manufacturing, and production teams
Supporting qualification, acceptance, and reliability testing processes מול customers, subcontractors, and internal teams
Managing laboratory activities, maintaining test setups, and supporting calibration and organization of lab equipment
Solving technical and system-level challenges under tight schedules and multidisciplinary constraints.

In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities:

Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!

Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

We are looking for an Experienced Formal Verification Engineer to join a team of talented engineers developing next-generation silicon for autonomous driving platforms.
This is a unique opportunity to enter one of the most challenging and rewarding disciplines in hardware development. Formal Verification combines deep understanding of computer architecture, digital design, and advanced verification methodologies to prove hardware correctness and uncover bugs that traditional testing may never find.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage.
Apply formal methods to verify the correctness of various complex digital systems.
Work with HW architects\designers to define assumptions, rules and cover properties.
Help define the formal verification methodology and environment to be applied by the team.
Explore new Formal methods and Tools.
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago.
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues.
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.

Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like:
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

In this visible role, you will be responsible for taking part of a SoC verification process of a large scale SoC.
You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market. You will work closely with the design team to ensure timely delivery of quality designs.
Working with methods to accelerate verification time.

Imagine what you could do here. At our company, new ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish.
The people who work here have reinvented entire industries with all our Hardware products. The same passion for innovation that goes into our products also applies to our practices - strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking our products.