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1 ימים
חברה חסויה
Location: Merkaz
Job Type: Full Time
We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.
Requirements:
BSc in Electronics Engineering or Computer Science
10+ Years of industry experience in verification, full chip dev. cycle.
Experience with System Verilog and UVM methodology - MUST
Advantages:
M.Sc. in Electronics Engineering or Computer Science
Working experience with Formal verification
Scripting skills in Python/Perl/shell
Hands-on experience with two or more of the following :
PCIE (Gen5 and above).
DDR (v4 and above).
AMBA protocol family, (inc. AXI4+, ACE/CHI)
ARM core architecture.
This position is open to all candidates.
 
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Location:
Job Type: Full Time
We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.
Requirements:
BSc in Electronics Engineering or Computer Science
10+ Years of industry experience in verification, full chip dev. cycle.
2+ years of experience in leading a team of engineers (including technical and personal mentoring, etc.)
Experience with System Verilog and UVM methodology - MUST
Advantages:
M.Sc. in Electronics Engineering or Computer Science
Working experience with Formal verification
Scripting skills in Python/Perl/shell
Hands-on experience with two or more of the following :
PCIE (Gen5 and above).
DDR (v4 and above).
AMBA protocol family, (inc.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
we are looking for a hands‑on Design Verification Lead to drive verification of next‑generation wired/wireless peripheral subsystems that power Snapdragon platforms.

As a DV Lead in the Peripheral group, you will own verification of complex IPs and subsystems, define and execute UVM‑based verification strategy, and lead a small team of talented engineers to first‑time‑right silicon.

This is a 5 days on site position in Haifa
What youll do

Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks

Architect, develop, and maintain UVM‑based constrained‑random verification environments

Lead day‑to‑day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance

Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation and validation teams

Analyze and close functional and code coverage, drive quality metrics to tape‑out criteria

Contribute to methodology and flow improvements across the Peripheral DV team
Requirements:
BSc/MSc in Electrical/Computer Engineering or related field

At least 7 years of hands‑on verification experience using UVM and SystemVerilog

Strong background in digital design and SoC/IP architecture

Proven technical leadership:

Prior experience leading or mentoring engineers or

Demonstrated ability and motivation to lead a small DV team (e.g., ownership of major IP, driving cross‑functional efforts)

High technical proficiency in:

UVM testbench architecture (agents, sequences, scoreboards, coverage)

Constrained‑random, coverage‑driven verification

Debugging complex failures in large‑scale regressions

Scripting (Python/Perl/Tcl/shell) in a UNIX/Linux environment
This position is open to all candidates.
 
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09/08/2026
Location: Haifa
Job Type: Full Time
We are looking for engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle.

As a CPU Verification Engineer on the Graviton team, you will be responsible for verifying the correctness, performance, and robustness of our next-generation ARM CPU cores and their surrounding subsystems. You'll work at the intersection of micro-architecture, system architecture, and software - ensuring our CPUs meet the highest quality bar before they reach silicon.
Requirements:
Basic Qualifications
- B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering degree.
- 5 years minimum experience in pre-silicon verification of complex digital designs.
- Working knowledge of ARM CPU architecture (ARMv8/ARMv9) privilege levels, exception model, memory model, and instruction set.
- Hands-on experience with SystemVerilog and UVM methodology.
- Experience with constrained-random verification, functional coverage, and assertions (SVA).

Preferred Qualifications
- Knowledge of the following programming languages (Python, Perl, shell).
- Knowledge of PCIe, Processors, Ethernet, DDR.
- Experience with formal verification tools and methodologies.
- Experience with performance modeling, profiling, or performance-driven verification.
- Experience verifying cache coherency mechanisms MOESI/MESI state machines, directory-based coherency, snoop filter operation, and multi-level cache hierarchies.
- Experience verifying ARM virtualization extensions.
This position is open to all candidates.
 
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22/07/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.
Requirements:
Basic Qualifications
- Electrical/Computer Science engineer.
- 4+ years of experience with RTL verification.
- Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification).
- Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman.

Preferred Qualifications
- Knowledge of the following programming languages: Perl/Bash/TCl/Python.
- Knowledge of PCIe, Processors, Ethernet, DDR.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
The Automated Driving Hardware group in Haifa is looking for an Experienced Formal Verification Engineer to join a team of talented engineers developing next-generation silicon for autonomous driving platforms.
This is a unique opportunity to enter one of the most challenging and rewarding disciplines in hardware development. Formal Verification combines deep understanding of computer architecture, digital design, and advanced verification methodologies to prove hardware correctness and uncover bugs that traditional testing may never find.
What will your job look like:
Be the owner of formal verification environment from first draft to sign-off stage
Apply formal methods to verify the correctness of various complex digital systems
Work with HW architects\designers to define assumptions, rules and cover properties
Help define the formal verification methodology and environment to be applied by the team
Explore new Formal methods and Tools
Work with tools like Cadence JasperGold, Verisium manager, Xcelium, Indago
Analyze verification results, identify bugs, and collaborate with engineers to resolve design issues
Develop generic formal blocks\functions of commonly used logic, to be later used off the shelf.
Requirements:
BSc in electrical engineering, computer engineering, or computer science
Passion for the field of Formal Verification
5+ years of experience in Formal Verification
Experience coding system-verilog hardware description language
Experience with scripting languages (e.g. python, tcl )
Strong analytical and problem solving skills
Ability to work independently and in a team-oriented environment.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
We are looking for a Process Validation Engineer to join our Operations Engineering team and play a key role in ensuring the quality, compliance, and reliability of our manufacturing processes and equipment within a global medical device environment.

In this role, you will lead and support validation and risk management activities across internal and external operations, helping ensure compliance with FDA and ISO requirements while driving continuous improvement initiatives.
You will be responsible for managing validation programs, maintaining risk management documentation, supporting audits, and collaborating closely with cross-functional teams to ensure high standards across systems, products, and processes.

This position requires a strong combination of technical expertise, analytical thinking, organizational skills, and the ability to manage multiple priorities in a fast-paced and highly regulated environment.

Success in this role means becoming a trusted subject matter expert for validation and risk-related activities, driving projects forward with a high level of ownership, maintaining strong collaboration with internal and external stakeholders, and ensuring compliance and operational excellence across validation processes.

What you will do:
Lead the creation of high-level test plans, validation assessments, and validation plans, while overseeing execution progress and completion.
Review and approve test methods, validation test plans, and validation results.
Manage validation samples and support validation execution activities across internal and external operations.
Serve as a point of contact for subcontractor test laboratories and support coordination of validation-related activities.
Maintain and regularly update pFMEA documentation and related risk management records.
Identify risks, support mitigation planning, and implement actions to maintain compliance and process reliability.
Support and conduct internal audits according to the annual audit program and report audit findings.
Manage relevant Issues, NCMRs, and CAPAs related to validation and quality activities.
Serve as a Subject Matter Expert (SME) for validation activities during internal and external audits.
Support continuous improvement initiatives related to systems, products, services, and validation processes.
Participate in and support calibration and preventive maintenance programs for measuring devices and test equipment, as needed.
Requirements:
B.Sc. degree in a scientific discipline or related Engineering/Science field, preferably Electronics, or equivalent practical engineering qualification in a relevant field.
Minimum of 3 years of experience as a Quality Engineer in a multinational medical device manufacturing and distribution environment.
Experience with qualification and validation of test methods, manufacturing processes, and related equipment used in validation, verification, or manufacturing activities.
Strong knowledge and practical use of quality tools such as Six Sigma, statistical techniques, sampling principles, risk assessment, and root cause analysis.
Six Sigma certification - an advantage.
Experience planning and overseeing product validation studies within the pharma and/or medical device industry.
Working knowledge of FDA medical device Quality Systems Regulations and strong understanding of quality regulations and standards, including 21 CFR 820, ISO 13485, and MDR.
Understanding of electro-medical devices and relevant regulations - an advantage.
Excellent English communication skills, both written and verbal.
Strong organizational and analytical skills with close attention to detail.
Ability to manage multiple projects and priorities simultaneously while interfacing effectively across all organizational levels.
This position is open to all candidates.
 
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03/08/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Chip Design Verification Engineer to develop the next generation of DFT technologies.

As a Chip Design Verification Engineer in the DFT team at NVIDIA, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.

3+ years of practical verification experience.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Experience with Specman is a plus.

Good understanding of RTL design (Verilog).

Strong debugging, problem solving and analytical skills.

Excellent communication and social skills.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, or a related field.
3 years of experience creating and using verification components and environments in standard verification methodology.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Knowledge of CPU/Processor architectures (e.g., pipeline, cache, memory subsystem, instruction sets, exceptions) like ARM, X86 or RISC-V, is highly beneficial for verifying processor cores or IP blocks.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design Verification Engineer, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will be a part of the Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/Universal Verification Methodology (UVM) or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, or equivalent practical experience.
4 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:
Masters degree in Electrical Engineering or Computer Science.
2 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
Experience with UVM, SystemVerilog, or other scripting languages (e.g., Python, Perl, Shell, Bash, etc.).
This position is open to all candidates.
 
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Location: Jerusalem
Job Type: Full Time
The Product Validation department is looking for a Validation Engineer.
Our department is responsible for delivering high-quality ADAS (Advanced Driver Assistance Systems) products.
We are the first line of support for our customers around the globe, and as our Validation Engineer, you will interact with most of our departments to achieve our goals.
What will your job look like:
Perform system-level validation of embedded systems, covering both hardware and software, with a strong focus on functional testing
Design and maintain test environments, including lab setups, test systems, and configurations.
Write and execute test plans and test cases based on system requirements, including manual and automated tests.
Validate communication protocols and system interfaces, and perform hardware bring-up and integration testing.
Install and support debug systems and sensors on development vehicles and assist automotive customers during integration.
Requirements:
B.Sc. in Electrical Engineering, Electronics Engineering, Communication Systems / Telecommunications Engineering, or equivalent.
At least 3 years of experience in validation, verification, or QA engineering.
Proven experience with embedded systems testing.
Experience working with communication protocols and basic networking concepts (e.g., data flows, interfaces, protocol behavior).
Hands-on experience with Linux-based systems.
Experience in test infrastructure, lab environments, and test setups.
Strong analytical, debugging, and problem-solving skills.
Strong teamwork abilities and excellent interpersonal communication skills.
Familiarity with defect tracking and validation tools (e.g., Jira) -an advantage.
Fluent in English and Hebrew.
This position is open to all candidates.
 
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