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לפני 12 שעות
חברה חסויה
Location: Haifa
Job Type: Full Time
This is an opportunity for you to integrate with end customers in both hands-on and advisory roles to solve technical challenges with various test cell set ups. To work on the bleeding edge of semi-test technology and to sharpen your relationship management skills while developing strategic partnerships that will round out your arsenal of 3rd party vendor provided products that enhance our solutions.

Key Responsibilities:
Influence next generation ATE tester and Test Cell product roadmaps
Work directly with leading edge semiconductor companies supporting their efforts to develop Test Cells to enable advanced chip designs to market
Responsible for the mastering of Teradyne Test Cell products, product applications and policies.
Provide expert advice to customers, Sales, FAEs and support staff while working closely with sales/marketing management and test cell staff to ensure that relevant technical information is promptly and accurately communicated.
Develop strategic relationships throughout our sales team and customer's key technical decision makers.
Work with marketing on technical differentiation and generation of technical proofs for use by the customer team.
Develop, present, and respond to proposals for specific customer requirements.
Coordinate, develop and deliver product demonstrations which display the value of our solutions.
Works closely with customers to define new test cell opportunities and support existing sustainment activities. Travel requirements could be 25% or greater.
Lead in new product introduction with integration at customer sites with project management, hands-on integration, and training activities.
Support emerging markets, acting as a liaison between customers and the engineering, marketing, and operations teams to help with their product development.
Keep informed and present updates on competitors, industry news and trends, products services, relevant information about legacy, existing, emerging technologies, and the latest product-line development.
Requirements:
BSME or BSEE or equivalent. MBA is a plus.
5+ years experience in the semiconductor capital equipment/ATE industry/Test Cell Products.
Solid electromechanical and machine design/applications development skills.
Experience with Analog, Mixed-Signal, complex SOC, RF, Memory testing
Strong understanding in PCB and signal delivery design
Strong understanding and operational knowledge of semiconductor material handling equipment (wafer prober and final test handlers)
Strong understanding of semiconductor device packaging and contact technologies (probe cards and contactors)
Basic understanding of Software development
Fundamental understanding of Release to Market (RTM) and Overall Equipment Efficiency (OEE) principals
Fundamental understanding of ATE material handling equipment is desired
Business background or equivalent marketing and/or sales experience desired
Experience with CAD software, Pro/Engineer or SolidWorks is a plus Fluent in English and Hebrew
Strong interpersonal and communications skills
This position is open to all candidates.
 
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לפני 12 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.
Requirements:
Minimum qualifications:
Bachelor's degree in Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, automatic test equipment (ATE) program development, and post-silicon enabling from new product introduction (NPI) through high-volume manufacturing.
Experience with ASIC test methodologies (MBIST, ATPG, DFT, SerDes, and sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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לפני 17 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Test Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our data centers are the most advanced in the world. In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high-volume manufacturing at wafer fabrications and Outsourced Semiconductor Assembly and Tests (OSATs). You will have an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next-generation of chips. You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will need to have a strong understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification, diagnostics, and failure analysis. You will work with various groups to deploy screening methodologies and flows for data processing, analytics and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
Responsibilities
Develop and implement high-volume manufacturing strategies for SoC products, optimizing ATE/SLT test coverage, reduce Defective parts per million (DPPM) and test costs, and manage product data integration.
Accelerate mass production via test program releases, data analytics, lot disposition, test time reduction, yield improvement, and return merchandise authorization (RMA) handling.
Partner with cross-functional teams (Test, Quality, Packaging, Operations) to deploy and maintain high-volume manufacturing (HVM) screening solutions.
Manage database integration for wafersort, final test, SLT, and burn-in, while overseeing test program integration, production release, binning, manufacturing flow definition, NPI material handling, and foundry process optimization.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience in product engineering or test engineering.
1 year of experience in people management, developing employees.
Experience with product engineering, supply chain data analytics or diagnostics for manufacturing or New Product Introduction (NPI).
Preferred qualifications:
Experience with industry standards, design tools, and design for testing (DFT) best practices, including at-speed transition delay fault (TDF), automatic test pattern generation (ATPG), memory built-in self-test (MBIST), memory repair, diagnostic tools, and yield improvement.
Experience with product engineering, supply chain data analytics and diagnostics for High Volume Manufacturing and NPI.
Experience evaluating customer returns with ATE and SLT, identifying coverage gaps, developing incremental structural and functional patterns to address quality issues, Statistical analysis (e.g., JMP), Yield Management Systems (e.g., Exensio, YieldExplorer, JMP), and Python for data analytics.
Understanding of skew lot definition, data collection, characterization, data analysis and report.
This position is open to all candidates.
 
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לפני 12 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Quality and Reliability Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our data centers are the most advanced in the world. In this role, you will help build the state-of-the art SoCs that power these data centers by driving quality and reliability processes from the Integrated Circuit perspective. This is an opportunity to create silicon and follow it into the field (and back!) to drive improvements for the next-generations of chips.
In this role, you will understand Integrated circuit (IC) flows, wafer processing, testing, qualification, yield, reliability, and failure analysis. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. Within the larger organization you will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
Responsibilities
Drive the strategic definition and development of Design-for-Reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
Define and lead the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure robust silicon and package verification.
Execute comprehensive silicon and package qualification programs (including HTOL, ELFR, ESD/LU, b/HAST, etc.) and conduct in-depth failure analysis to resolve quality issues.
Extract and analyze large-scale data from qualification programs, high-volume manufacturing, and field returns to identify failure mechanisms and trends for yield and reliability optimization.
Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, TDDB, NBTI) to predict device failure mechanisms and lifetime behaviors.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field or equivalent practical experience.
8 years of experience in IC silicon quality or reliability.
Experience leading the product reliability life-cycle from post-tapeout through manufacturing.
Experience with semiconductor Complementary Metal-Oxide-Semiconductor (CMOS) technology, device physics, and failure mechanisms.
Preferred qualifications:
Master's degree in Electrical Engineering, Materials Science, or related fields.
Experience in statistical data analysis using tools such as JMP, Python, or JSL.
Familiarity with Electrical Failure Analysis (EFA) and Physical Failure Analysis (PFA) techniques.
Knowledge of Design-for-Reliability (DfR) rules and implementation techniques.
Track record with silicon reliability on process nodes and advanced packaging technologies.
This position is open to all candidates.
 
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 12 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Test Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Product sustain support, including volume data analysis, test time and yield improvements, assess test escapees and RMAs, localize failures, implement containment measures and partner with design, manufacturing, quality and reliability teams to root cause and implement corrective actions.
Develop tools, flows and methodologies to continuously improve and automate the testing life cycle.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or related
8 years of experience in test engineering
Experience in pre-silicon validation, test content generation, ATE program development, and post-silicon enabling from new product introduction through high volume manufacturing.
Experience with ASIC test methodologies (e.g., mbist, atpg, dft serdes, sensors).
Experience in Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experienced in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Ability to be motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 17 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required CPU Design for Test Engineer, Cloud
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency,
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
4 years of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools.
Experience with industry-standard Automatic Test Pattern Generation (ATPG) methods, fault modeling, and scan coverage debug.
Experience validating Memory Built-In Self-Test (MBIST) structures and Joint Test Action Group (JTAG)/ Test Access Port (TAP) controllers.
Experience running structural verification, debugging testbenches, or simulation tracking utilizing simulators.
Preferred qualifications:
Master's degree in Electrical Engineering.
Experience with the Tessent shell environment, specifically extracting Instrument Connectivity Language (ICL) networks.
Familiarity with Silicon bring-up and validation on Automatic Test Equipment (ATE) testers, including debugging hardware execution patterns.
Proficiency using Python or Tcl to manage complex Electronic Design Automation (EDA) design and sign-off flows.
This position is open to all candidates.
 
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Location: Haifa
Job Type: Full Time
Required Systems Service Engineering Manager
Job Description Summary
The Systems Service Engineering Manager - Molecular Imaging, is a key member of the Systems Engineering leadership team responsible for leading the Service Engineering team across Molecular Imaging product platforms. This role drives Design for Serviceability (DFS), service strategy, diagnostics, installation, calibration, maintainability, reliability, and field support readiness throughout the product lifecycle. The leader manages a team of Service Engineers and partners closely with Systems Engineering, Product Management, Quality, Manufacturing, Reliability, and Global Service teams to deliver highly serviceable, reliable, compliant, and customer-focused solutions.
Job Description
Lead and develop a high-performing Service Engineering team supporting Molecular Imaging products and platforms.
Drive Design for Serviceability (DFS) requirements and ensure service considerations are integrated into system architecture and product design.
Ensure establishment of service requirements, traceability, verification, and validation plans across the product lifecycle.
Drive service engineering strategies related to installation, calibration, diagnostics, preventive maintenance, field modifications, upgrades, and repair.
Partner with Product Engineering, Systems Engineering, Quality, Regulatory Affairs, Reliability, Manufacturing, and Service Operations teams.
Lead service engineering team activities across multiple new product introduction (NPI) and sustaining programs.
Drive resolution of complex field issues and product serviceability challenges.
Develop technical roadmaps that improve service efficiency, uptime, product quality, and customer satisfaction.
Champion continuous improvement, harmonization, and adoption of engineering standards and best practices.
Manage resources, priorities, and technical execution across multiple programs.
Coach, mentor, and develop engineering talent while fostering a culture of accountability, innovation, and customer focus.
Influence strategic technology decisions and support business planning activities.
Requirements:
Bachelors Degree in Mechanical or Electrical Engineering or related technical discipline.
Minimum 4 years of experience in Systems Engineering or Service Engineering, Product Development, or related technical functions.
Minimum 2 years of people leadership experience.
Experience leading multidisciplinary teams developing complex systems integrating hardware, software, and customer workflows.
Demonstrated experience driving cross-functional technical programs.
Desired Characteristics:
Experience in Molecular Imaging, Nuclear Medicine, PET/CT, SPECT/CT, or other medical imaging modalities.
Strong understanding of Design for Serviceability (DFS) methodologies.
Strong customer focus and understanding of field service operations.
Knowledge of requirements management, risk management, verification and validation practices.
Strong systems-thinking and problem-solving capabilities.
Excellent communication, stakeholder management, and influencing skills.
Familiarity with Agile development methodologies.
Leadership Expectations:
Create an inclusive environment that develops people and builds organizational capability.
Demonstrate GE HealthCare leadership behaviors and culture.
Drive operational excellence, simplification, and continuous improvement.
Build strong partnerships across global engineering and service organizations.
Deliver measurable improvements in serviceability, reliability, quality, and customer satisfaction.
This position is open to all candidates.
 
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22/07/2026
Location: Haifa
Job Type: Full Time
As a Signal & Power Integrity Engineer on the Nitro team, you'll work on next-generation cloud infrastructure hardware while developing your skills in Signal Integrity and Power Integrity. This is an opportunity to learn SI/PI analysis and simulation while applying your hardware design knowledge to solve complex challenges in high-speed digital systems. You'll be mentored by experienced engineers and contribute to products that directly impact our customers.

Key job responsibilities
- Design and debug high-speed digital circuits for K2 cards and server platforms.
- Learn and apply SI/PI simulation methodologies for PCB and system-level designs.
- Collaborate with Package design, SerDes and DRAM IP provider, firmware, EC2, and manufacturing teams.
- Perform signal integrity analysis for high-speed interfaces and SerDes channels at the advanced of the technology.
- Analyze and optimize power delivery networks from card to system level.
- Support hardware bring-up, debug, and validation with hands-on lab work.
- Participate in design reviews and provide technical feedback with internal and external design teams.
- Work with cross-functional teams to resolve signal quality and power integrity issues.
- Contribute to design guidelines and best practices based on measurements and analysis.
Requirements:
Basic Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of experience in hardware design or development.
- Strong understanding of digital circuit design fundamentals and PCB design.
- Experience with high-speed interfaces (PCIe, DDR, SerDes, Ethernet, or similar) and hands-on lab equipment.

Preferred Qualifications
- Familiarity with SI/PI simulation tools (HFSS, PowerSI, ADS, or similar).
- Understanding of transmission line theory, impedance concepts, and S-parameters.
- Experience with scripting (Python, MATLAB, or similar) for data analysis.
- Knowledge of PCB stackup design, material properties, and power delivery networks.
- Experience with hardware validation and production testing.
- Experience working on complex multi-layer PCB designs.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8749805
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לפני 18 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SOC Quality and Reliability Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our data centers are the most advanced in the world. In this role, you will help build the state-of-the-art SoCs that power these data centers by driving quality and reliability processes from the Integrated Circuit perspective. You will have an opportunity to create silicon and follow it into the field and back to drive improvements for the next-generations of chips.
You will have an understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification, yield, reliability, and failure analysis is expected. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. You will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead the strategic definition and development of Design-for-Reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
Establish and direct the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure silicon and package verification.
Execute comprehensive silicon and package qualification programs (including high-temperature operating life (HTOL), early life failure rate (ELFR), electrostatic discharge and latch-up (ESD/LU), and biased highly accelerated stress test (b/HAST)) and conduct in-depth failure analysis to resolve quality issues.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Materials Science, Physics, or a related field or equivalent practical experience.
4 years of experience in Integrated Circuit (IC) silicon quality or reliability.
Experience leading the product reliability life-cycle from post-tapeout through high-volume manufacturing.
Experience with semiconductor complementary metal-oxide-semiconductor (CMOS) technology, device physics, and failure mechanisms.
Preferred qualifications:
Master's degree in Electrical Engineering, Materials Science, or related field.
Expertise in statistical data analysis using tools such as JMP, Python, or JMP Scripting Language (JSL).
Familiarity with electrical failure analysis (EFA) and physical failure analysis (PFA) techniques.
Knowledge of design-for-reliability (DfR) rules and implementation techniques.
Track record with silicon reliability on process nodes and advanced packaging technologies.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8782483
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חברה חסויה
Location: Haifa
Job Type: Full Time
Required Advanced Manufacturing Engineer
Role Summary
The Advanced Manufacturing Engineer (AME) is responsible for industrializing and sustaining complex PET and SPECT imaging products at a high‑complexity electromechanical manufacturing site. The AME ensures robust manufacturability of high‑level mechanical assemblies, electronics integration, wiring, detector modules, motion systems, and system‑level testing. The role drives process development, tooling, validation, DFM/DFA, quality improvement, and readiness for production and NPIs.
NPI Leadership for PET & SPECT Imaging Systems:
Lead manufacturing readiness for new PET/SPECT products, including process layout, tooling development, and new equipment introduction.
Participate in design reviews and influence DFM/DFA/DFT across mechanical assemblies, detector modules, power systems, wiring harnesses, and electromechanical subsystems.
Translate design intent into controlled, stable manufacturing processes.
Coordinate ECO implementation and ensure smooth manufacturing release.
Assembly Process Development & Optimization:
Develop robust assembly processes for mechanical and electronic integration, alignment, torque control, and detector installation.
Define and design manufacturing jigs, tools, fixtures, and lifting/handling solutions required for large subsystems.
Lead design/manufacture of equipment, tooling, and jigs internally or via suppliers to eliminate defects.
Drive LEAN manufacturing implementation and support continuous improvement.
Conduct PFMEA for existing and new processes.
Quality & Problem Solving:
Drive product quality improvements by identifying manufacturing issues and implementing cost‑effective solutions.
Work with Production Associates to resolve manufacturing and quality problems.
Oversee corrective action implementation in production or suppliers.
Support RCA through structured failure analysis.
System Integration & Testing Support:
Support integration/testing of assembled PET/SPECT systems including calibration, alignment, motion validation, detector gain calibration, and safety checks.
Work with System Engineering to define test protocols and acceptance criteria.
Troubleshoot system issues related to electromechanical assemblies.
Validation & Regulatory Compliance:
Own IQ/OQ/PQ for equipment, tools, and manufacturing processes.
Ensure compliance with ISO 13485, ISO 14971, 21 CFR 820, IEC 60601, and internal QMS requirements.
Maintain strong documentation practices including control plans, validation protocols, and DHR/DMR accuracy.
Ensure traceability for critical parameters, torques, and calibration data.
Supplier & Cross‑Functional Collaboration:
Collaborate with suppliers of mechanical assemblies, detector modules, wiring harnesses, and PCBs.
Lead technical discussions with suppliers for tooling, process capability, and quality issues.
Train and qualify production and supplier teams on processes and inspection/assembly methods.
EHS & Plant Compliance:
Lead and support Environment, Health & Safety efforts aligned with site goals.
Ensure safe handling of large assemblies, HV systems, and radiation‑related components.
דרישות:
Drive product quality improvements through systematic problem solving.
Lead design requirements for manufacturing processes, tools, and fixtures.
Design and manufacture jigs, fixtures, and tooling (internal or supplier‑managed).
Strong experience with LEAN manufacturing and PFMEA execution.
Ability to resolve complex manufacturing and quality issues.
Leadership of NPI activities including tool development and equipment introduction.
ECO coordination and controlled release management.
Strong understanding of compliance, EHS, and regulated manufacturing.
Ability to train and qualify production and supplier teams.
Mechanical/electromechanical assembly expertise.
Experience with HV/LV wiring, detector systems, and motion integration.
Strong analytic המשרה מיועדת לנשים ולגברים כאחד.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8745600
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דיווח על תוכן לא הולם או מפלה
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
7 ימים
Location: Haifa
Job Type: Full Time
we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary System Validation Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.
Job Description
The mission of this role is to perform system validation for our companys highly advanced devices, that includes defining strategy, develop tools, innovate, be creative to make sure devices are performing as they should in all aspects, logical, performance, durability, stress and more.
You will be part of the site located at Israel (Haifa - Matam), surrounded with highly experienced and professional engineers who will escort, mentor and support you on your journey at our company Labs Israel.
Requirements:
Strong academic and technical background in electrical or computer engineering
3-5 years experience validating and/or developing complex SoC/silicon products for Networking and/or Server & Storage applications
Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and work with minimal guidance and supervision.
Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!
Required experience.
Hands-on, thorough knowledge of high-speed protocols like Ethernet CXL, PCIe, NVMe,.
Silicon/System bring-up, validation, and debug experience, including customers systems.
A Python coding experience
Familiarity with validation techniques C, C++
Experience with lab equipment as protocol analyzers, chambers, in-circuit debuggers, and CPU-based tool suites.
Familiarity with lab testing automation techniques
Preferred experience
Familiarity with devices trees and related debugging techniques.
Familiarity with board system design
C\C++ for embedded FW and device drivers
Basic understanding of x86/ARM architecture, UEFI/Linux boot sequence
Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums to adapt the tests to be run from X86/ARM based platforms.
Experience working with DRAM memory vendors on DDR4 or DDR5 to identify issues and working on SoC HW/FW to improve memory calibration and tuning sequences.
Knowledge of memory subsystem compliance from a data integrity and RAS is a plus.
Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8773886
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