דרושים » חשמל ואלקטרוניקה » Senior RAS and Power Management Firmware Architect

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18/06/2026
Location: More than one
Job Type: Full Time
We are seeking a technical leader to define, craft, implement, and guide firmware architecture for reliability, availability, serviceability, and power management across next-generation Networking products and platforms. You will take a strong hands-on role, working with hardware, firmware, software, validation, customer engineering, and external partners to build robust, diagnosable, power-efficient systems for large-scale deployments.

What you'll be doing:

Define platform-level firmware architecture for RAS and power management across SoCs, accelerators, DPUs, servers, embedded systems, and data center platforms.

Own error detection, classification, containment, recovery, escalation, and reporting architecture.

Define firmware architecture for power sequencing, power states, reset flows, thermal and power fault handling, idle management, and recovery from power-related failures.

Create firmware specifications for hardware error handling, health monitoring, crash capture, telemetry, diagnostics, debug data, and field serviceability.

Define interfaces and contracts between firmware, hardware, operating systems, BMCs, management controllers, platform software, and cloud/service infrastructure.

Drive architecture reviews, tradeoff discussions, failure-mode analysis, validation strategy, and long-term RAS and power management roadmap planning.

Establish standards for error logs, event schemas, telemetry flows, recovery policies, service diagnostics, and production debug infrastructure.

Guide engineering teams through implementation, validation, silicon bring-up, platform integration, and production deployment of RAS and power management features.

Analyze customer and field failures, identify architectural gaps, and feed lessons learned into future platform designs.
Requirements:
What we need to see:

BSc, MS, or PhD in Electrical Engineering, Computer Science, Computer Engineering, or equivalent experience.

7+ years of relevant experience in firmware, platform architecture, embedded systems, or low-level systems software.

Deep understanding of RAS principles, fault modeling, error containment, recovery policies, diagnosability, and serviceability requirements.

Experience architecting firmware for complex hardware platforms such as SoCs, accelerators, DPUs, servers, networking devices, or embedded systems.

Strong knowledge of power management concepts, including power sequencing, reset architecture, thermal and power fault handling, power state transitions, and platform recovery flows.

Familiarity with boot firmware, UEFI/BIOS, BMC, embedded controllers, RTOS, embedded Linux, or platform management stacks.

Strong understanding of hardware/software interfaces, registers, interrupts, telemetry paths, debug infrastructure, and firmware-to-hardware contracts.

Programming and debugging fundamentals across languages such as C/C++, Python/Perl scripting, Verilog, assembly, or RISC-V assembly.

Ability to lead cross-functional architecture discussions and drive alignment across hardware, firmware, software, validation, product, and customer-facing teams.

Excellent communication skills, strong technical leadership, and a real passion for working collaboratively.


Ways to stand out from the crowd:

Experience with PCIe AER, CXL RAS, memory RAS, ECC/parity, accelerator RAS, networking RAS, high-availability systems, or large-scale data center platforms.

Knowledge of ACPI, SMBIOS, UEFI, PLDM, MCTP, Redfish, IPMI, or cloud telemetry systems.

Experience with power/thermal fault handling, dynamic power management, platform power sequencing, low-power states, or autonomous recovery mechanisms.

Background in silicon bring-up, platform validation, production diagnostics, or customer failure analysis.

Prior technical leadership experience as a firmware architect, principal engineer, platform lead, or domain owner.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
The Senior Hardware Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
we are the data platform company for the AI era. We are building the enterprise software infrastructure to capture, catalog, refine, enrich, and protect massive datasets and make them available for real-time data analysis and AI training and inference. Designed from the ground up to make AI simple to deploy and manage, our company takes the cost and complexity out of deploying enterprise and AI infrastructure across data center, edge, and cloud.
Our success has been built through intense innovation, a customer-first mentality and a team of fearless workers who leverage their skills & experiences to make real market impact. This is an opportunity to be a key contributor at a pivotal time in our companys growth and at a pivotal point in computing history.
Role and Responsibilities:
Test Development & Validation
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI)
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.
Requirements:
Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or related field.
5-8+ years of experience in manufacturing test engineering, preferably in electronics/hardware products.
Proficiency in test automation tools (e.g., LabVIEW, Python, C#, TestStand).
Familiarity with manufacturing processes
Strong problem-solving and analytical mindset.
Excellent communication and collaboration across cross-functional teams.
Ability to lead projects, mentor junior engineers, and work with global teams.
Desired Qualifications
Good understanding and experience of server systems including test methodology for CPU, memory and motherboards
Experience with IPMI and testing BMC functionality
Familiarity with networking and testing networking infrastructure
Experience with storage architecture, including testing SSDs
Experience with PCIe debugging and testing
Bench-top electrical debug tool experience as well as electrical design of test circuitry
Knowledge of programming devices such as CPLDs.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Architect, Digital Signal Processing, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Staff Engineer on the Digital Signal Processing team, you will be a technical leader responsible for architecting and developing the core algorithms that power our next-generation data center interconnects. You will leverage your expertise in communication theory, forward error correction (FEC), and modulation to design novel, low-complexity solutions that push the boundaries of speed and reliability.
In this role, you will not only define the technical direction for critical projects but also mentor other engineers and collaborate across hardware and software teams to bring your goal to life in silicon.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the architecture, design, and implementation of digital signal processing (DSP) algorithms for high-speed optical communication systems. Drive the long-term technical roadmap for our signal processing and communication architectures by staying current with academic and industry trends.
Develop and analyze novel forward error correction (FEC) and modulation schemes to optimize for performance, power, and complexity tradeoffs.
Create comprehensive system-level models using tools like Matlab, Python, or C++ to simulate and validate algorithm performance.
Collaborate closely with logic design, verification, and software teams to ensure the successful implementation, integration, and bring-up of algorithms in custom silicon.
Provide technical leadership and mentorship to a team of DSP and communication systems engineers, fostering innovation and engineering excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
10 years of experience in digital signal processing, communication theory, and algorithm development.
Experience in the design and implementation of algorithms for communication systems, including FEC or modulation techniques.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
Experience in the theory and practical implementation of modern FEC codes (e.g., LDPC, staircase, polar codes) and advanced modulation formats.
Experience in designing and modeling high-speed optical communication transceivers or similar high-bandwidth systems.
Experience leading the development of algorithms from initial concept through to successful silicon production.
Strong publication record in conferences or journals in the field of communications or signal processing.
Excellent programming skills in Matlab for algorithm development, simulation, and analysis.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation and Debug Engineer
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Contribute to developing and improving post-silicon test content that exercises both IP and SoC levels workloads and other compute-intensive scenarios.
Collaborate with architecture, design, and firmware teams to define comprehensive validation plans for SoC features, focusing on power consumption, thermal management, sensors behavior, and performance metrics.
Work closely with design and firmware teams to propose and implement solutions for optimizing SoC power efficiency and performance, including tuning core-to-memory latencies and bandwidth, power control loops, thermal control loops, etc.
Develop and maintain automated test scripts and frameworks (primarily in Python) to improve validation efficiency and coverage.
Participate in early silicon bring-up and platform bring-up activities, ensuring the stability and functionality of high-power multi-core SoCs.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience with functional tests for silicon validation (i.e., writing in C, C++ or Python, or similar).
Experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Experience in debugging and triaging.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Familiarity with pre-silicon development environments (e.g., emulation, software modeling).
This position is open to all candidates.
 
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18/06/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Join our team as a Senior Power and Performance Architect - Networking, influencing the future of our network systems.

What you'll be doing:
Develop, model, and validate groundbreaking power and performance optimization techniques for network fabrics, components (NICs, Switches), and systems. Collaborate closely with cross-functional teams including silicon design, system architects, software/firmware engineers, performance analysts, thermal engineers, and AI researchers to ensure end-to-end power and performance optimization. You will determine strategies that successfully implement flawless performance and power efficiency in our ambitious projects!
Requirements:
What we need to see:
BSc or MSc or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science or a related field.
5+ years of relevant experience in network architecture, design, or performance analysis.
Solid understanding of power consumption dynamics in network hardware (NICs, switches, cables) and systems.
Proven experience in network architecture and design, particularly for large-scale systems (Data Center, HPC, AI Clusters).
Strong understanding of network protocols (Ethernet, InfiniBand, RoCE, TCP/IP) and their impact on performance and efficiency.
Demonstrable expertise in network performance analysis, bottleneck identification, and tuning.
Familiarity with the characteristics and network demands of AI/ML workloads
Utmost passion for attention to details in design and a high focus on design quality, particularly concerning power/performance trade-offs.

Ways to stand out from the crowd:
Advanced degree or equivalent experience in a related field.
Proven dedication to system-level power/performance trade-off analysis, especially in distributed computing or large-scale network environments.
Experience in power modeling, measurement techniques, or relevant tools for network components and systems.
Proficiency with network simulation tools (e.g., ns-3, OMNeT++, proprietary tools) or performance modeling frameworks.
Understanding of silicon-level power characteristics and optimization techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Power Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Our Platforms Infrastructure Engineering team designs and builds the
hardware and software technologies that power all of our services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of our users.
Responsibilities
Develop methodology of SoC roll up of power reduction, projection, configuration, test plan and tools.
Work intact with Architecture, Frontend and Backend teams driving power reduction features (both logic and circuit).
Work with power delivery and packaging teams on simulations and scenario definitions.
Work with Architecture and design verification (DV) to define power scenarios and tests, debug, and integrate into the flow. Track whether power goals are met throughout execution.
Lead the power of a project. Own project priorities, and allocation of technical resources within the project, informing and escalating appropriately when external factors impact execution.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or a related technical field, or equivalent practical experience.
8 years of experience in power estimation and optimization flows and tools.
Experience with vector based physical design power tools (e.g., PTPX prime power).
Preferred qualifications:
Experience with power optimization techniques (multiple threshold voltage/power/voltage domain design, clock gating, power gating, dynamic voltage and frequency scaling (DVFS)/adaptive voltage scaling (AVS), etc.) and power management.
Experience with scripting languages (i.e., Python, Perl, TCL or Bash).
Experience in post silicon measurements, telemetry, correlation to pre-silicon.
Knowledge of the impact of software and architectural design decisions on power and thermal behavior of the system (thermal mitigation and scheduling, cross-layer policy design).
Knowledge of system software components (i.e., Linux, drivers, runtime performance analysis, etc.).
Knowledge of register-transfer level (RTL) micro-architecture and design for power.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Silicon Validation Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as firmware, software, design, design verification (DV), architecture (ARCH) and multiple production teams.
Provides a quality functional coverage for our designs.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related field, or equivalent practical experience.
8 years of experience with functional tests for silicon validation, (i.e., writing C or C++) or developing firmware, and embedded software.
5 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience with experience with Core architecture knowledge
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Proficiency in code and system health, diagnosis and resolution, and software test engineering.
Understanding of object oriented programming and functional programming.
Ability to write and understand SystemVerilog register transfer level (RTL) code.
Excellent software skills and design practices.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior DFT Lead
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
In this role, you will work to shape the future of an Edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
You will be part of a team that pushes boundaries, developing autonomous solutions that define the next-generation of intelligent infrastructure and hardware for the edge. You will contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
Responsibilities
Drive and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Collaborate with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Oversee DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Design For Test from DFT architecture to post-silicon production support.
4 years of experience with people management.
Experience with DFT design and verification for multiple projects, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and common industry tools, DFT and Physical Design flows, and DFT verification flow.
Experience in leading DFT activities throughout the ASIC development flow.
Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in post-silicon Debug, test or product engineering.
Experience in Joint Test Action Group (JTAG) and Internal JTAG (iJTAG) protocols and architectures.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture and multiple production teams.
Provide a quality functional coverage for our designs.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
5 years of experience with functional tests for silicon validation, (i.e., writing C or C++) or developing firmware, and embedded software.
5 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience with Core architecture.
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Experience in code and system health, diagnosis and resolution, and software test engineering.
Understanding of object oriented programming and functional programming.
Ability to write and understand SystemVerilog register transfer level (RTL) code.
Excellent software skills and design practices.
This position is open to all candidates.
 
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21/06/2026
Location: Ra'anana
Job Type: Full Time
We are seeking to hire an expert Firmware Design Engineer for the Ethernet Switch Firmware Core team. The next generation of Switches are a crucial component of the most innovative AI and Cloud Computing Networks in the world. As a member of the Ethernet Firmware Team, you will craft and develop the firmware abstraction layer in the ETH Switch. This role will require you to participate in the design & development of firmware while working closely with hardware and architecture team to ensure timely delivery of our products to the market.

What you'll be doing:

Highly involved in the entire software development process from architecture to integration testing of firmware for the Spectrum ASIC product line.

Work with HW & ASIC team to provide insights into developing the next gen of the groundbreaking of silicon and systems.

Design and implement algorithms to improve system scale and performance.

Work with higher layer software teams to debug issues reported by customers (internal and external).

Design, implement and integrate new features according to the product roadmap.

Have a new insight on how to improve our software? Why not! Bring your ideas to life by innovating during our hackathons

Collaborate with other R&D teams around the globe.
Requirements:
What we need to see:

2+ years of proven experience developing firmware for embedded systems.

2+ years of experience with C/C++ in Real-Time Embedded system. Preferably C.

BS in Computer Science / Computer Engineering / Electrical Engineering or equivalent experience.

Proven expertise with Networking protocols (at L2, L3, L4 layers).

Strong technical debugging skills in Embedded Systems.

Creative, self-motivated and collaborative person comfortable working with local and international teams.

Problem solving frame of mind combined with interpersonal skills.

Familiarity with ASIC development processes and code executions on FPGA.


Ways to stand out from the crowd:

Previous experience working with Networking Products like Network Adapters/Switches.

Patents in the fields of networking, communication protocols, ASIC design, computer architecture etc.

Journal publications, Conference papers, along with strong referrals.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8702704
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Post-Silicon Validation Engineer, Networking
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
We are building a new team to lead the post-silicon validation efforts for our cutting-edge product. We're looking for highly motivated and talented engineers to join us in ensuring the quality and functionality of our next-generation networking silicon. This is a unique opportunity to be part of a foundational team and make a significant impact.
As a Silicon Validation Engineer, you'll play a pivotal role in the validation of our custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. Your expertise in post-silicon validation will be essential in identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Conduct in-depth analysis into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities.
Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on Pre-Silicon (Pre-Si) emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues.
Contribute to the development of test infrastructure and methodologies to improve validation efficiency and coverage.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
8 years of experience with functional tests for silicon validation (i.e., writing in C or C++ or Python or similar).
8 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Ability to learn new systems quickly and work on their own in a changing environment.
Excellent communication and collaboration skills.
Excellent problem-solving skills.
Passion for technical issues with and a strong sense of ownership.
Interest in hardware and a passion for transitioning into silicon validation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8720598
סגור
שירות זה פתוח ללקוחות VIP בלבד