דרושים » מדעים מדוייקים » Verification Engineer (IL)

we are looking for a dft Verification engineer for developing the next generation dft technologies.
as a dft Verification engineer at our company, you will verify the design and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and complex products. our dft solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the dft design, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our dft verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

Required System Validation Engineer
Yokneam, Northern, Israel
We are expanding our System Validation Group and invite you to explore Space with us!
Outstanding opportunity to be part of a super-cutting-edge team working on systems above and beyond the globe
What you will be doing​:
Writing system validation Test plans , Design and develop Test programs to validated embedded system features and performance.
Conducting System Validation Test cycles to verify systems based on HW (analog and Digital), RF, SW, FW
Experience with Python or C programing, Git or other programming languages & source control.
Strong technical troubleshooting.
Develop tools and utilities for Lab & field testing, feature analysis
High debug capabilities when work with the Software, systems, HW teams on complex issues.
Ability to move fast and decisiveness.
Building development environment.
Designing automate tests.
E2E ownership product from kickoff to production.

our company is hiring a senior, hands-on engineer to lead technical innovation in our design verification (dv) automation infrastructure. this role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. you will directly influence how verification is performed across our next-generation networking chips, enabling more scalable, efficient, and robust flows for complex asics powering the ai revolution. 
what you'll be doing:
lead the development of advanced verification automation tools, regression flows, and debug infrastructure.
identify key challenges and inefficiencies in current dv methodologies and proactively propose and implement improvements.
work closely with dv engineers, design teams, and tool developers to ensure solutions are practical and impactful.
balance innovation with hands-on engagement in daily dv issues - keeping a strong connection to real-world challenges and support needs.
act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for dv automation.

seeking a highly motivated and hardworking software engineer with hands-on capability technical experience, to verify the design and implementation of the next generation data processing unit software, with wide range of features related to Cyber security and Embedded systems. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. at nvidia, we're united in our quest to transform the way smart adapters are used.
what you'll be doing:
collaboration & communication: work closely with software, architecture, product and DevOps teams to define TEST requirements, coordinate releases, and ensure high-quality product delivery.
end-to-end feature ownership: deep dive into feature sets, taking responsibility from TEST plan development to final implementation and full automation
develop and automate testing: design, implement, and maintain automated TEST scripts and frameworks (primarily in Python ) to verify the correct functionality of our software products
system & integration validation: validate software functionality and performance through system -level and integration testing, utilizing Linux -based environments and virtualization tools.
defect analysis: analyze TEST results, open bugs and track issues to closure, ensuring robust and scalable solutions.
continuous improvement: drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.
TEST environment management: set up, maintain, and optimize TEST environments using Linux, docker, virtual machines, and other modern tools.
regression monitoring: operate, monitor, and analyze failures in the nightly regression system, providing methodical root-cause analysis across hardware, os, and software layers.

our company is looking for an outstanding software Verification engineer to join the virtio-net verification team. you will closely work with our driver and sdk developers, performance team and gain a deep understanding of our networking products and technologies on top of our bluefield cards. you will lead features from design through implementation to integration into frameworks, develop robust infrastructure, and work collaboratively with cross-functional teams.
this position offers the opportunity to have a real impact in a dynamic, technology-focused company, influencing product lines that empower the most advanced data centers in the world. we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
what youll be doing:
work closely with virtio-net developers to TEST new components and features, including crafting and executing unit, functional, integration, and performance tests.
develop a verification environment that can qualify the product from functional and performance perspectives using Python.
analyze coverage measures to identify verification holes and to show progress towards product development and releases.
be responsible for the verification of system design and software using advanced verification methodologies.

we are hiring a skilled senior dpu performance Validation engineer for our dpu product lines. this includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems. working in the network silicon engineering group, you will be responsible for debugging, analyzing, and validating performance and functional behavior of current and future silicon devices. you will collaborate with chip design, verification, fw, and architecture teams to ensure successful product development with bold product cycles. the qualified candidate should be comfortable working in simulation and emulation environments, with strong skills in rtl-level debug, waveform analysis, and system -level performance root cause analysis.
what you will be doing:
learn and analyze system -level operation of dpus
debug and root-cause performance issues in pre-silicon environments, across rtl, waveform traces, and multi-die system simulations.
collaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues.
develop and improve validation methodologies for performance experiments and data collection.
automate repetitive debug and validation tasks to scale coverage and efficiency.

Our Formal Verification (FV) team is seeking a visionary AI Verification Engineer to join our elite Networking Chip Design group. Our team is unique: we define the infrastructure and drive the methodologies for proving the correctness of the worlds most advanced AI and networking architectures. We operate at the cutting edge, leveraging a sophisticated ecosystem of proprietary in-house formal tools and industry-leading vendor EDA solutions.

In this role, you will be a key architect in our "AI-for-FV" evolution. You will work in close collaboration with our internal CAD and Design Technology AI teams to enhance our in-house toolset with artificial intelligence. You won't just be using tools; you will be building the "brains" that sit on top of them-utilizing LLMs and Machine Learning to automate intent-to-proof workflows and debug complex chips with unprecedented speed.

What Youll Be Doing:

In-House Tool Evolution: Partner closely with internal CAD teams to integrate AI capabilities directly into our proprietary FV infrastructure.

Methodology Architecture: Define and evolve the FV teams specialized methodologies, moving from manual property writing to AI-automated assertions.

Next-Gen Orchestration: Develop and integrate AI agents and ML models that interface with our toolchain to automate "intent-to-assertion" workflows and optimize coverage and convergence.

Intelligent Debugging: Create AI-based debug assistants that analyze formal counter-examples, categorize failures, and autonomously suggest fixes for complex logic problems.

Collaborative Intelligence: Act as the bridge between the FV team, Design Technology AI, and CAD groups to ensure our AI solutions provide end-to-end efficiency from RTL to A0 tapeout.

Leadership & Training: Act as the authority on AI integration, training the broader team on how to leverage "human-in-the-loop" AI tools and automated methodologies.

we are looking for a formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of core technology.
learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

we are looking for a talented, fast learner, and highly motivated chip design - Verification engineer. as a member of our chip design team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, verification environment coding and logic debug. this position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. we have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
what you'll be doing:
as a member of our chip design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of chip design related logic. day to day tasks include:
understand and analyze uarch definitions.
implement verification components to verify rtl meets specifications.
collaborate with our rtl, arch and uarch teams.
work on logic related to switch design.

we are looking for a senior formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of nvidia's core technology.
you will learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.