דרושים » חשמל ואלקטרוניקה » senior design automation engineer - chip design

our company is at the forefront of ai-driven innovation in vlsi design automation. join us to shape the future of semiconductor design with cutting-edge ai tools and make a significant impact in a collaborative, high-performance environment. are you ready to push the boundaries of whats possible in vlsi cad? come be part of our pioneering team!
what you'll be doing:
you will be responsible for developing and integrating advanced cad solutions and automation flows using ai and Machine Learning for vlsi design, verification, and implementation.
work closely with design, verification, and cad teams to identify areas for improving vlsi workflows using advanced tools and methods.
research, prototype, and deploy ai-based algorithms.
develop and maintain scripts and automation infrastructure to enable seamless adoption of ai tools in the vlsi design process.
continuously review emerging ai technologies and methodologies to keep our cad environment up-to-date.
provide Technical Support and training to engineering teams on ai-enabled cad flows and best practices.

seeking a highly motivated and hardworking software engineer with hands-on capability technical experience, to verify the design and implementation of the next generation data processing unit software, with wide range of features related to Cyber security and Embedded systems. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. at nvidia, we're united in our quest to transform the way smart adapters are used.
what you'll be doing:
collaboration & communication: work closely with software, architecture, product and DevOps teams to define TEST requirements, coordinate releases, and ensure high-quality product delivery.
end-to-end feature ownership: deep dive into feature sets, taking responsibility from TEST plan development to final implementation and full automation
develop and automate testing: design, implement, and maintain automated TEST scripts and frameworks (primarily in Python ) to verify the correct functionality of our software products
system & integration validation: validate software functionality and performance through system -level and integration testing, utilizing Linux -based environments and virtualization tools.
defect analysis: analyze TEST results, open bugs and track issues to closure, ensuring robust and scalable solutions.
continuous improvement: drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.
TEST environment management: set up, maintain, and optimize TEST environments using Linux, docker, virtual machines, and other modern tools.
regression monitoring: operate, monitor, and analyze failures in the nightly regression system, providing methodical root-cause analysis across hardware, os, and software layers.

Our Formal Verification (FV) team is seeking a visionary AI Verification Engineer to join our elite Networking Chip Design group. Our team is unique: we define the infrastructure and drive the methodologies for proving the correctness of the worlds most advanced AI and networking architectures. We operate at the cutting edge, leveraging a sophisticated ecosystem of proprietary in-house formal tools and industry-leading vendor EDA solutions.

In this role, you will be a key architect in our "AI-for-FV" evolution. You will work in close collaboration with our internal CAD and Design Technology AI teams to enhance our in-house toolset with artificial intelligence. You won't just be using tools; you will be building the "brains" that sit on top of them-utilizing LLMs and Machine Learning to automate intent-to-proof workflows and debug complex chips with unprecedented speed.

What Youll Be Doing:

In-House Tool Evolution: Partner closely with internal CAD teams to integrate AI capabilities directly into our proprietary FV infrastructure.

Methodology Architecture: Define and evolve the FV teams specialized methodologies, moving from manual property writing to AI-automated assertions.

Next-Gen Orchestration: Develop and integrate AI agents and ML models that interface with our toolchain to automate "intent-to-assertion" workflows and optimize coverage and convergence.

Intelligent Debugging: Create AI-based debug assistants that analyze formal counter-examples, categorize failures, and autonomously suggest fixes for complex logic problems.

Collaborative Intelligence: Act as the bridge between the FV team, Design Technology AI, and CAD groups to ensure our AI solutions provide end-to-end efficiency from RTL to A0 tapeout.

Leadership & Training: Act as the authority on AI integration, training the broader team on how to leverage "human-in-the-loop" AI tools and automated methodologies.

we are looking for best-in-class senior full-chip Verification engineer to join our networking silicon team. in this role, you will be responsible for the development and verification of our next-generation nics at the system level. you will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the worlds most advanced data centers, enjoy working in a meaningful, growing environment where you make a huge impact in a technology-focused company.
what youll be doing:
full-chip verification & execution: own complex system -level features by defining verification plans and driving the end-to-end execution.
system -level debug & analysis: gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
cross-team collaboration: work closely with multiple teams within organizations such as architecture, u-arch, firmware and all units inside the nic
ai-enhanced development: accelerate development by leveraging cutting-edge ai coding tools and frameworks.

we are looking for a TEST development engineer to join our team. this role will work as part of a team driven by the development of our company networking and interconnect products. do you have a passion for automation development, TEST program development, code writing and looking for sophisticated and significant topics? we will be happy to have your skills on the team. you will handle various projects across teams, build TEST plans, automate TEST specification and execution. you will continuously innovate and develop scalable, reliable, high-performance systems and tools to enable the next generation of interconnect products.
what youll be doing:
will work on projects across multiple functional teams from different geographies throughout the product lifecycle
develop TEST plans, and execute testing via automation and manually for all supported hardware releases
work with cross-functional teams across engineering, thermal, mechanical, and hw to identify TEST requirements
develop automation and tools for our hardware releases and TEST environment
debug hw & sw failures in interconnect products, isolate the problem, and get to the root cause
design and build technical processes to address business issues
deploy the TEST solution to the production sites and provide support if needed.
train personnel on the required processes and operations of complex TEST systems.
ensure all testing is being conducted in compliance with all safety protocols.

we are looking for an experienced dft engineer to join an exceptional team of dft experts to develop the next generation dft technologies.
as a dft engineer at the networking group at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are seeking a Principal verification engineer to be a technical lead in the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and adopting new technologies. One of our main goals is to define, build and use best in class technologies make sure that the chip design team works in an efficient manner and provides high-quality deliveries at scale. This position offers the opportunity to drive foundational flows and have a profound impact in a dynamic, technology-focused company.

What you'll be doing:

Define groundbreaking methodologies to create a flawless experience for verification engineers.

Mentor and guide designers and verification specialists to tackle complex technical challenges.

Identify design risks, define the verification scope, and lead infrastructure development to ensure design correctness.

Technically guide the development process of shared verification code and infrastructure to be widely used by the global chip design team.

Partner with the design automation team to provide end-to-end solutions that unify verification, simulation, and automation.

Collaborate with EDA vendors to learn about innovative tools/technology and integrate them into our long-term verification strategy.

Lead verification strategies, training sessions.

we are looking for a dft Verification engineer for developing the next generation dft technologies.
as a dft Verification engineer at our company, you will verify the design and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and complex products. our dft solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the dft design, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our dft verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

we are looking for a system Engineer to join our failure analysis engineering team under the system product engineering group in the company. as a system failure analysis (fa) engineer, you are responsible for the end-to-end investigation of product failures. you act as the failure analysis product owner diagnosing complex issues that span hardware, software, firmware, and mechanical boundaries of the investigation, synthesizing data from all engineering disciplines to reach a definitive root cause. while you provide the architectural oversight for the team, you remain deeply technical and active in the laboratory environment.
what youll be doing:
hands-on lab investigation: you are active in the lab environment. you perform advanced debugging, characterize system behavior, run reproductions of failures in the lab, and utilize sophisticated lab equipment to validate hypotheses, bridging the gap between high-level data and physical hardware reality.
multidisciplinary failure analysis: lead deep-dive investigations into system -level failures, understand and analyse customer usage for the product, diagnose how software execution, firmware logic, and hardware components interact to cause specific failure modes.
root cause ownership: drive the investigation lifecycle from initial symptom to final physics-of-failure or logic-error identification.
task force leadership: orchestrate and lead cross-organizational technical task forces at the company level. you align experts from hw, sw, mechanical, and npi teams to solve high-priority technical problems.
advanced data & ai integration: define and utilize sophisticated data analysis tools and ai-driven methodologies. you correlate customer failure patterns with production telemetry and rma history to identify hidden trends and systemic risks.
customer quality support: take part in the customer interface by interacting with our customer quality engineers. you provide the deep technical evidence and root-cause clarity needed for quality reports and high-level technical presentations.
strategic lab direction: define the high-level debug strategy and complex TEST plans for the lab. you guide hardware practical engineers on characterization requirements and system -level stress testing.

we are now looking for best-in-class senior chip design Verification engineer to join our outstanding network adapter silicon group, developing the industry's best high-speed smart communication devices, data processing unit (dpu), delivering the highest throughput and lowest latency! come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you'll be doing:
work in a verification team which develops some of the networking silicon core units.
build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.
gain a strong understanding of chip micro-architecture and features, and develop the verification environments.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.