דרושים » הנדסה » CAD ATE Engineer

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define and implement solutions for complex design, integration and verification problems using in-house and external technical solutions or tools. Ensure chip quality by implementing best practices and implementing quality control measures.
Involve in project development and convergence with the highest quality, agreement with issues as they arise through design and implementation, or equivalent relevant experience.
Connect between RTL design, physical design, DFT, external IPs and SoC while maintaining project priorities.
Maintain project infrastructure and stability.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help build SoCs by driving quality and reliability processes from the Integrated Circuit (IC) perspective. Working with various cross-functional teams, you will develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute test plans. Within the larger organization, you will collaborate with global hardware quality and reliability, silicon design, validation, and engineering teams. You will have an understanding of IC flows, wafer processing, testing, qualification, yield, reliability, and failure analysis.
The ML, Systems, and Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define and lead qualification hardware and test developments in front of internal teams and external vendors.
Define and execute Silicon and package qualification activities (e.g., HTOL, ELFR, ESD/LU, b/HAST, THB, etc.).
Extract, manipulate, and analyze large volumes of data from Silicon and package qualification programs (e.g., HTOL, ELFR, ESD, LU, UHAST, TCT, etc.), High Volume MFG, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield, quality, and reliability improvement.
Own cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (e.g., RMA Triage, Analytics, Failure Analysis, etc.).
Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, TDDB, NBTI, HCI, Time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use Application-Specific Integrated Circuit (ASIC) design experience to be part of a team that develops complex ASIC System-on-Chip (SoC) intellectual property from proof-of-concept to production. This includes creating IP Level microarchitecture definitions, Register-Transfer Level (RTL) coding and all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies, including design generation automation. You will collaborate with members of architecture, software, verification, power, timing, synthesis design for testing etc. You will develop/define design options for performance, power and area.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the IP microarchitecture level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
Perform RTL development (coding and debug in Verilog, SystemVerilog).
Conduct function/performance simulation debug and Lint/CDC/FV/UPF checks.
Engage in synthesis, timing/power closure, and ASIC silicon bring-up.
Contribute to verification test plan and coverage analysis of block and SoC-level.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power our company's most demanding Compute and AI/ML applications.
In this role, youll work to shape the future of strategic Data Center silicon. Youll be an early and key contributor in a nascent high-growth team that pushes boundaries, developing advanced custom IP and solutions. You will need expertise in one or more of the following areas: wireline communications, analog circuit design, Digital Signal Processor (DSP) design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed input/output (IO) industry standards. Your role has a significant component of cross-collaboration with a broad set of cross-functional organizations. You'll bring out the best in the team to deliver designs that serve many of our companys advanced data center products.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Architect and design high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
Bring up new silicon, characterize performance, and test for electrical compliance in lab environments.
Work with packaging, board design, and firmware teams to ensure seamless integration into System-on-Chips (SoCs).
Adhere to standards like IEEE or OIF for high-speed protocols and optimize power consumption.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power our company's most demanding Compute and AI/ML applications.
In this role, youll work to shape the future of strategic Data Center silicon. Youll be an early and key contributor in a nascent high-growth team that pushes boundaries, developing advanced custom IP and solutions. You will require expertise in one or more of the following areas: wireline communications, analog circuit design, Digital Signal Processor (DSP) design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed input/output (IO) industry standards. Your role has a significant component of cross-collaboration with a broad set of cross-functional organizations. You'll bring out the best in the team to deliver designs that serve many of our companys advanced data center products.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Architect and design high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
Bring up new silicon, characterize performance, and test for electrical compliance in lab environments.
Work with packaging, board design, and firmware teams to ensure seamless integration into System-on-Chips (SoCs).
Adhere to standards like IEEE or OIF for high-speed protocols and optimize power consumption.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our companys data centers are the most advanced in the world. Developing and deploying comprehensive manufacturing test and data analytics solutions for volume manufacturing at wafer fabs and OSATs. In this role, you will help to manufacture the SoCs that power these data centers. You will create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next generation of chips. To assure performance and screen devices, you will help to integrate SoC technologies into devices and drive manufacturing test flows. You will drive yield improvement, cost optimization and work closely with cross functional teams to ensure the optimal test coverage in production to ensure SoCs. An understanding of IC flows, wafer processing, testing, qualification, diagnostics, and failure analysis is expected. You will work with various groups to deploy screening methodologies and flows for data processing, analytics and diagnostics, you will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design, and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies, as well as manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules, DC tests, binning, production, and characterization flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Develop tools, flows, and methodologies to continuously improve and automate the testing life cycle.

our company's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our company's standards of quality and reliability.
As a Silicon Validation Engineer at our company Cloud, you will play a pivotal role in the validation of our company's custom silicon solutions that power our cloud infrastructure bringing it to the highest quality level. With your expertise in post-silicon validation, you will be identifying and resolving issues before they impact our customers, ensuring a seamless and high-performance cloud experience.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware, Software, Design, Design Verification, Architecture and multiple production teams.
Provide a quality functional coverage for our company designs.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead an ASIC subsystem.
Understand how ASIC subsystem interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.The ML, Systems, and Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers.