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לפני 1 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an excellent Firmware Design Engineer for our FW PHY Group. The person will closely work with our FW development, architecture, chip design teams and gain deep understanding of our Networking products and technologies. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Work on the next development Fusion GPU project.

Design and develop PHY-layer firmware for cutting-edge networking devices.

Enabling new SerDes and physical linkup flows

Work closely with the architecture, HW, and SW design teams

Define implement and maintain FW algorithm to control the Silicon

Develop and test FW on emulation & simulation environments during the Pre-silicon phase

Debug and screen HW/FW/SW issues

Take an active part in silicon bring-up and SW development phases

Lead data-driven discussions about the product functionality and areas for improvement
Requirements:
What we need to see:

B.Sc. or M.Sc. in Electrical or Computer Engineering.

3+ years of relevant experience.

Proficient programming in C.

Debugging experience and ability to investigate and triage difficult problems in embedded FW.

Good communication skills and the ability to work with people across several countries.

Ability to work with interrupts and dynamic environment with good spirit.

Excellent English verbal and written communication skills.

Ways to stand out from the crowd:

Proficient in Python and MatLab.

Good understanding of SerDes operation.

Experience with developing the physical layer of communication protocols.

Knowledgeable of Hardware/Software Development Process.

Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.
This position is open to all candidates.
 
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11/01/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an excellent Firmware Design Engineer for our FW PHY Group. The person will closely work with our FW development, architecture, chip design teams and gain deep understanding of our Networking products and technologies. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Work on the next development Fusion GPU project.

Design and develop PHY-layer firmware for cutting-edge networking devices.

Enabling new SerDes and physical linkup flows.

Work closely with the architecture, HW, and SW design teams.

Define implement and maintain FW algorithm to control the Silicon.

Develop and test FW on emulation & simulation environments during the Pre-silicon phase.

Debug and screen HW/FW/SW issues.

Take an active part in silicon bring-up and SW development phases.

Lead data-driven discussions about the product functionality and areas for improvement.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Electrical or Computer Engineering.

3+ years of relevant experience.

Proficient programming in C.

Debugging experience and ability to investigate and triage difficult problems in embedded FW.

Good communication skills and the ability to work with people across several countries.

Ability to work with interrupts and dynamic environment with good spirit.

Excellent English verbal and written communication skills.

Ways to stand out from the crowd:

Proficient in Python and MatLab.

Good understanding of SerDes operation.

Experience with developing the physical layer of communication protocols.

Knowledgeable of Hardware/Software Development Process.

Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.
This position is open to all candidates.
 
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3 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a creative and experienced Senior Firmware Engineer to join our PCIe Firmware team-someone passionate about using artificial intelligence to engineer the foundational hardware of the AI revolution.

As an integral part of our team, you'll architect and implement the core of our next-generation devices. This senior role places you at the center of innovation, where you will have a direct impact on our business and technology by solving sophisticated technical challenges. Its a unique opportunity to shape our technology and empower customers to build the supercomputers and AI fabrics of tomorrow.

What You'll Be Doing:
Lead the architectural design, development, and optimization of cutting-edge PCIe firmware, using AI-driven modeling and insights to deliver exceptional performance.

Serve as a trusted technical expert by investigating, debugging, and resolving challenging PCIe firmware issues for our most important customers.

Collaborate closely with our Chip Design, Verification, Software, and Architecture engineers to find root causes and develop robust, long-term solutions.

Champion the integration of AI-assisted diagnostics and generative AI tools across the entire development lifecycle to boost team productivity and innovation.

Translate customer needs and field data into actionable feedback that directly shapes the future of our products.
Requirements:
What We Need to See:
A degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience.

8+ years of significant professional experience in embedded firmware development, with a deep understanding of PCIe.

A strong foundation in computer architecture, operating systems, and object-oriented programming.

Proficiency in scripting languages like Python to automate tasks and workflows.

An innovative approach with a genuine desire to apply AI and machine learning to accelerate firmware development.

Ways to Stand Out from the Crowd:
Track record of applying AI-powered tools like Cursor to accelerate the development lifecycle.

Previous experience in a customer-facing or application engineering role.

Direct, hands-on experience with PCIe switch architecture and its firmware in high-performance applications.

Deep knowledge of hardware verification concepts and tools (e.g., C++, Python, Jenkins).

Extensive knowledge of networking protocols and the Linux operating system.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:
Work in a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.
Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.
Requirements:
What we need to see:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered
Experience in full and cluster-level verification is an advantage
Self-motivated, ability to work independently and drive tasks to completion
A great teammate with strong communication and interpersonal skills.

Ways to stand out from the crowd:
Knowledge in Specman, Verilog
Knowledge in Networking
Great interpersonal skills.
This position is open to all candidates.
 
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13/01/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

At least 2 years of relevant experience

Proficiency using Python, Perl, Tcl, Make scripting.

Expertise in analysing and converging crosstalk delay, noise glitch, and electrical/manufacturing rules in deep-sub micron processes.

Knowledge in physical design and optimization e.g. placement, routing, cell sizing, buffering, logic restructuring, etc. to improve timing and power required and implementing them through ECOs is required.

Knowledge in process variation effect modelling and experience in design convergence taking into account variations.

Successful track record of delivering designs to production is necessary.

Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.

Ways to stand out from the crowd:

Familiarity with synthesis, place and route, STA EDA tools from Synopsys (DC/FC/PT), Cadence (Innovus/Tempus)

Experience in methodology definition / flow owner of synthesis / Place and Route/ STA steps is an advantage.

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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11/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Our Networking System Validation Group is growing, and we are hiring a Junior Switch System Validation Engineer. As a member of the team, you will take part in our core network projects which drive the growth of the company, tech and business wise. You'll gain networking and Switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like Quality-of-Service, performance, logic correctness, and AI features.

You will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages.

You should have a good grasp of software development in different fields, such as Python Scripting, embedded software, and device firmware. It's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans.


What you will be doing:

Work in a combined design and verification team specializing in Switch Full Chip works.

Understand the Switch architecture and build on test plan accordingly.

Develop Full Chip test collaterals/suites, maintain regressions, debug failures and sign-off coverages.

Maintain test suites to facility Emulation and/or Silicon platforms checkout as well.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Compute Engineering or Computer Science.

4+ years of experience.

Knowledge in Python and experience with C and C++ in a Linux environment.

Understanding and familiarity of networking designs and micro-architecture.

Outstanding ability to communicate, clearly present one's ideas, and able to work as a team.


Ways to stand out from the crowd:

Prior knowledge/experience with network protocols.

Experience with Object Oriented Programming, Operating Systems and Multi-Threaded application development.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach - identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.

What you'll be doing:

Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.

Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.

Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.

Balance innovation with hands-on engagement in daily DV issues - keeping a strong connection to real-world challenges and support needs.

Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering (or related field).

5+ years of experience in Design Verification/Chip Design, with a deep understanding of simulation, testbenches, regression infrastructure, and debug.

Proven ability to identify inefficiencies or recurring issues in DV workflows and develop automation scripts or tools to streamline processes and improve efficiency.

Strong analytical thinking and problem-solving skills.

Proficiency in Python and Linux.

Excellent communication and collaboration skills - comfortable working across engineering teams.

Ways to stand out from the crowd:

Experience with contemporary DV methodologies, such as intelligent test planning or advanced debug workflows (e.g., automated log parsing, waveform analysis, or triage tooling).

Familiarity with recent industry trends in design verification, including AI-assisted debugging, smart triage, or LLM-based tools.

Proven ability to craft and deliver custom automation flows that scale to large regressions or complex simulation environments.

Hands-on contribution to DV infrastructure development within CAD/DA teams or large SoC projects.

Comfort working across teams, collecting feedback, and turning it into practical, adopted tooling.
This position is open to all candidates.
 
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18/01/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Design-for-Test Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:
You will be in charge of state of the art Design for Test/ATPG flows and implementation.
Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.
Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:
3+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.
Strong programming skills in scripting languages.
BSc. in Electrical Engineering or Computer engineering.
Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.

Ways to stand out from the crowd:
Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.
Experience in Mentor TestKompress ATPG tool and retargeting flow.
Programming languages: TCL, PRL, Phyton & Unix shell scripts.
Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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18/01/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced DFT Engineer to join an exceptional team of DFT experts to develop the next generation DFT technologies.

As a DFT engineer at the networking group, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.

10+ years of practical experience.

Exposure to rtl implementation and coding.

Familiarity with verification tools.

Familiarity with backend flows.

Strong debugging, problem solving and analytical skills.

Strong communication and social skills are required.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.

Ways to stand out from the crowd:

Prior Design, Verification experience.

Experience in working with back-end on area, power and timing closures.

Experience with CDC flows and tools.

Experience with silicon testing.

Cad tool development experience.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate, or equivalent experience.

2+ years of experience in RTL verification.

Self-motivated, ability to work independently and drive tasks to completion.

A team player with good communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Background in Networking.
This position is open to all candidates.
 
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18/01/2026
Location: More than one
Job Type: Full Time
We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
What we need to see:

B.Sc, M.Sc, or Ph. D degree in Computer Science, Computer Engineer, or Electrical Engineer.

At least 5 years of industry or research experience in computer networks.

Excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network.

Experience in development of simulation environments.

Possess strong managerial, problem solving and critical thinking skills.

Ability to work and operate in a highly dynamic environment.

Partner with multiple groups in the organization.

Ways to stand out of the crowd:

Strong understanding in network protocols - such as InfiniBand, IP, TCP and RoCE and network topologies.

Good knowledge in Python, C++.

Good knowledge with AI models.

Familiarity with HPC environments, routing algorithms, Omnet++ and NS3 simulation environments.
This position is open to all candidates.
 
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