Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to manufacture the SoCs that power these data centers by developing and deploying comprehensive manufacturing test and data analytics solutions for high volume manufacturing at wafer fabs and OSATs. This is an opportunity to create silicon in the most advanced technologies and follow it into the field to close the loop back to design and test for the next generation of chips. You will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization and work closely with cross functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will have an understanding of IC flows, wafer processing, testing, qualification, diagnostics, and failure analysis. You will help design, deploy and maintain hardware required to screen high performance compute silicon at various stages of the manufacturing pipeline.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Manage ATE platform setup (including loadboard/probecard design) and change kit, SLT bench platform, and handler.
Identify and screen potential vendors (including technological and budgetary assessment) and track and verify progress at all stages of the design.
Define probecard and loadboard requirements based on testing strategy, accounting for test time, tester memory, and budget.
Review SI/PI simulations and final design signoff.
Validate probecard and loadboard hardware and open testing pipeline.

we are seeking a skilled failure analysis (fa) engineer with expertise in x-ray inspection techniques to join our av platform team. the ideal candidate will specialize in using advanced x-ray imaging and other analysis methods to investigate product failures, identify root causes, and provide actionable insights to improve product quality and reliability what will your job look like?
perform detailed failure analysis using x-ray imaging systems and related diagnostic tools to inspect electronic components, assemblies, and materials.
interpret and analyze x-ray images to detect structural anomalies, defects, voids, cracks, delamination, and other failure mechanisms.
develop and optimize x-ray inspection procedures and protocols for failure analysis and quality control.
prepare TEST specimens: cutting, mounting, grinding, polishing and chemical etching
collaborate with product engineering, Quality Assurance, and manufacturing teams to support product development, troubleshooting, and continuous improvement efforts.
prepare detailed technical reports documenting findings, root cause analyses, and recommended corrective actions.
support reliability testing and failure mode analysis for new and existing products.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-Specific Integrated Circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation-based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, supporting the hardware and lab bring up, and verifying our ASIC systems.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation EDA tools, licensing, and job management in our company infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

we are looking for a senior pcb design layout engineer to join our hardware engineering team at the autonomous vehicle platform department as a key player in the development of next-generation ecu (electrical control unit) for autonomous vehicles. what will your job look like?
working closely with hardware and mechanical design engineers, you'll perform pcb layout our ecus and other products.
complete development of cad layout from footprint definition, detailed component placement, constraints management, with a concept of topology and signal and power integrity.
be responsible for the design releases required generation of artwork files, odb++, fab drawings, ict report, and electronic pcb documentation.
your designs will need to follow ipc class 3, signal and power integrity constraints, emi/rfi control and automotive regulations.

We are redefining urban mobility by proving that autonomous vehicles can navigate complex environments using vision-only technology.
As our Hardware Systems Integration Engineer, you will be the lead architect responsible for the "nervous system " of our vehicles. You won't just be selecting components; you will be evaluating infrastructure that enables our AI software to see, process, and React to the world in Real-Time.
Responsibilities:
* Vision-Centric Architecture: Lead the selection and integration of high-dynamic-range (HDR) automotive-grade cameras.
* Compute Platform Selection - Evaluate and benchmark high-performance edge platforms (e.g., NVIDIA Orin, Qualcomm Snapdragon, Ambarella, or custom SOC solutions) capable of handling massive parallel video streams with minimal latency.
* Thermal & Power Integrity: Design integration of computing HW into automotive grade environment. This work can be done with external suppliers.
*  system Synchronization: design and ensure sensor synchronization.
* Redundancy Planning: architect fail-operational hardware systems to ensure the vehicle remains safe even if a specific component or communication bus fails.
* Present to and consult with the group leaders as to hardware design trade-offs

We are looking for a Verification Team Leader for our team in Haifa to drive verification for next-generation PHY IPs . The PHY DV team operates at the intersection of verification, research, and innovation, continuously improving techniques, models, and flows to increase the efficiency and quality of PHY verification. This is a hands-on technical leadership role, combining deep verification expertise with team leadership and close collaboration with design, architecture, firmware, and system teams.
Description
Lead the verification team, including hiring, planning, and communication with management.
Strong teamwork and communication skills.
Responsibilities
Lead the verification team, including hiring, planning, and communication with management.
Define verification architecture and lead for execution
Own verification methodologies, standards, and best practices across the team

we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Maintain and upgrade emulation models and infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team and customers, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation EDA tools, licensing, and job management in our company infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., DDR, PCIe, Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.

abra professional services is seeking for an Field Technician We are looking for a Field Technician – Certified Electrician to join the Operations team and support the maintenance and operation of cellular network infrastructure in the Northern region The role involves extensive field work, including configuration, maintenance, and troubleshooting of cellular sites, radio equipment, and transmission systems. The technician will be responsible for ensuring network availability, performance, and quality while working in dynamic and sometimes challenging environmental conditions. Key Responsibilities:
* Maintenance and operation of cellular network infrastructure
* Configuration and commissioning of cellular sites, including radio and transmission equipment
* Troubleshooting and resolving faults at cellular sites
* Integration of cellular sites, including RF chains, antennas, radio systems, and transmission equipment
* Installation, operation, and maintenance of AC/DC power systems
* Field work under varying environmental conditions
* Participation in on-call rotations, including nights, weekends, and holidays

we are the production TEST team - responsible for the definition, development, and deployment of production TEST operations for the worlds most advanced socs for adas and self-driving vehicles.
this is your opportunity to join a team during its initial forming stage and leave your mark as our company assumes full ownership for its silicon production operations to enable high volume manufacturing for cutting-edge automotive products. what will your job look like?
work closely with the design teams from early stages of the design process to review dfx architecture and define TEST requirements.
define TEST methodologies and generate TEST content for high-speed interfaces of Embedded ip blocks (lpddr4/5, pcie gen4/5, d/ C /mphy).
TEST program coding, pattern conversion and pre-si validation (virtual TEST simulations)
support load board and probe card design activities.
lead post-si TEST program debug activities to enable delivery of samples to internal and external customers.
TEST program characterization and tuning to enhance TEST program quality to meet automotive standards.
support quality & reliability team to enable effective and timely qual plan execution.
lead TEST deployment activities with tier-one foundry and osat vendors to enable large-scale wafer-sort and final- TEST operations.