דרושים » הנדסה » Experienced Verification Team Leader - FPGA/ASIC #1294

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7 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a Experienced Verification Team Leader - FPGA/ASIC.
Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Location: Tel Aviv office or our Beer Sheva office, which is located next to the train station.
Responsibilities:
Drive verification of complex, high-speed ASIC/FPGA designs
Define and implement advanced verification methodologies
Collaborate with architecture, software, and validation teams
Mentor engineers and promote technical excellence
Work with technologies like high-speed interfaces, network processors, and SoCs
Requirements:
B.Sc. in Computer Science or Electrical Engineering
7+ years of hands-on verification experience
Proven end-to-end ASIC flow experience (design to tapeout)
Strong teamwork and communication skills
Advantage:
Leadership or technical management experience
Ability to guide teams toward successful delivery
This position is open to all candidates.
 
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לפני 1 שעות
חברה חסויה
Job Type: Full Time and Hybrid work
Our group is responsible for the development of the company next generation SOC for AI Networking Compute. The development starts from product definition through architecture, design, verification and up to implementation.

The complex SOC is a high-performance device running AI scale-out for inference workloads computer for vision and audio processing, with technologies from multi-disciplines.
In this position you will have end-to-end responsibility for all design flow. In this position you will be responsible for full cluster/block uarch, design, initial synth, lint, integrating and supporting PD, DFT and verification.

If you are curious, innovative, have strong technical skills with a hands-on approach, and understand the full design, system view and SW integration requirements, this position is for you!
Requirements:
7+ years of experience as a VLSI design engineer
B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
Experience in defining uarch and design of complex design units.
SOC design experience.
full cluster/block uarch, design, inital synth, lint, integrating and supporting PD, DFT and verification.
Advantages

Experience in HW implementation of packet processing / Ethernet / Infiniband / RDMA Experience in high-speed interfaces DDR/PCIe - great advantage!
Leading VLSI teams/projects
Verification experience and knowledge with SV/UVM
CPU subsystem multi-core designs experience
Experience with Synthesis and STA analysis
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
we are looking for a Senior CAD Engineer.
What you'll do
You'll be joining our Physical Design team within Silicon One, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
A VLSI Design Engineer with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering or Computer Engineering with relevent background.
​ 5+ years of hands-on experience in a relevant domain
Strong understanding of Place & Route flow
Preferred qualifications:
Deep understanding of Physical construction and Integration.
Knowledge of Physical Design Verification methods like LVS/DRC and formal verification.
Experience with PD CAD and Physical Design EDA tools (e.g., Synopsys, Cadence).
Ability to support technology adoption and new tool integration.
Great teammate, self-learner, and able to work independently
This position is open to all candidates.
 
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11/01/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior verification manager for our FC Switch Silicon team. As a FullChip verification manager in NVIDIA's Networking business unit, you'll lead a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a FC team, responsible to integrate and verify the Switch at system level.
Lead and grow a team of FullChip verification engineers.
Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.
Provide technical guidance, mentoring, and support to engineers in the team.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Dynamic verification environments planning for units infrastructures and system level.
Work with design/verification team which develops core units within the Switch silicon.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
6+ years of managerial experience in a chip design or verification domain.
10+ overall years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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30/12/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of our company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites - one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within our company spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are seeking a Digital Electrical Design Engineer with extensive experience in board-level digital design, high-speed interfaces, and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D team-guiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites. While prior quantum or cryogenic experience isnt required, an interest in learning about these cutting-edge fields is a plus.
Key Responsibilities:
Digital Board-Level Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
End-to-End Development: Own the entire hardware lifecycle-from concept and schematic design in Altium to layout review, testing, and production release.
Design for Manufacturing & Test (DFM/DFT): Integrate manufacturing and testing considerations into your designs, collaborating with supply chain and production teams to ensure scalability and cost-effectiveness.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardware-firmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.
Requirements:
10+ years of hands-on experience in digital electronics design (board-level), focusing on FPGA-based systems, microcontroller integration, and/or high-speed communication.
Demonstrated expertise in high-speed signal integrity, including multi-GHz clocks and GT lines.
Proficiency with Altium or similar PCB design tools.
Understanding of Agile and/or Kanban methodologies in a hardware development context.
Proven track record of taking products from concept through production, including schematic design, layout oversight, and system bring-up.
Experience with DFM and DFT principles, plus involvement in supply chain and production processes.
Excellent communication skills in English, with the ability to collaborate across geographical boundaries.
B.Sc. or higher degree in Electrical Engineering or a related field.
Personal Attributes:
Passionate Technologist: Thrives on complex challenges and cutting-edge design work.
Team Player: Enjoys collaborating with global, cross-functional teams in a dynamic, fast-paced environment.
Independent & Proactive: Takes ownership of responsibilities, drives initiatives forward, and maintains a can-do attitude.
Adaptable: Comfortable with uncertainty and rapidly evolving priorities in a matrix organization.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
we are looking for a ASIC Logic Design Engineering Technical Leader.
our Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab
Requirements:
B.Sc./M.Sc. in Electrical Engineering from a top university
​Minimum of 8 years of proven experience in a relevant field
RTL design experience
Familiarity with UVM and functional verification methodologies
Preferred Qualifications:
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with Clock Domain Crossing (CDC)
This position is open to all candidates.
 
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6 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking an experienced ASIC AI/ML Engineer with deep expertise in AI/ML infrastructure and application development specifically for semiconductor design verification disciplines. The ideal candidate will have a proven track record of delivering end-to-end AI solutions from concept to large-scale production deployment.
In this role, you will collaborate directly with architects, designers, verification engineers, software teams, and backend specialists to define best practices and deploy production-ready AI-driven workflows and applications. Your focus will be on implementing LLM, GenAI, and classical ML solutions that transform our ASIC design verification processes and accelerate our path to tape-out.
Key job responsibilities
Develop and maintain scalable AI/ML infrastructure for ASIC design and verification teams
Architect, develop, and deploy production-ready AI/ML applications for semiconductor design workflows
Design and implement GenAI solutions including LLMs and agentic AI systems for verification processes Invent innovative AI-driven solutions to eliminate identified inefficiencies in design and verification flows
Establish best practices and standards for AI/ML application development in semiconductor environments
Create monitoring and observability frameworks for AI model performance in production design environments
Collaborate cross-functionally with architects, designers, verification engineers, and software teams
Research and evaluate emerging AI technologies for applicability to semiconductor design challenges.
Requirements:
- Experience with modern ASIC/FPGA design and verification tools
- Developed scalable AI/ML infrastructure for semiconductor design and verification teams
- Creating and maintaining automation frameworks for design or verification
- Practical semiconductor design/verification work experience
Preferred Qualifications
- Master's degree in Electrical Engineering or a related field
- Current on emerging AI technologies for semiconductor design and verification applications
- Proficient in full-stack development and infrastructure for state-of-the-art classic ML and generative AI technologies.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
We are driving innovation in automotive technology, developing solutions that power the next generation of vehicles. We are looking for a Junior Engineer who is eager to learn, grow, and make an impact in a dynamic and innovative environment. This is a unique opportunity to work alongside experienced professionals, gain hands-on experience, and contribute to projects at the forefront of automotive electronics. If you are passionate about technology, curious to explore new challenges, and excited to make a real difference, we are the place to develop your skills, innovate, and grow your career.
Why join us?
* Work on cutting-edge automotive projects.
* Learn from a talented and supportive team.
* Gain exposure to real-world automotive challenges.
* Grow your career in a collaborative and inspiring environment.
If youre ready to take the next step in your career and be part of something meaningful, wed love to meet you!
About The Position:
As a Junior ASIC Design Engineer, you will take part in the full lifecycle of advanced chips that power the next generation of vehicles. This is a hands-on, growth-oriented role where youll work closely with experienced ASIC engineers, gain exposure to real silicon, and build a strong foundation in chip design and verification. In this role, you will:
* Be part of a professional ASIC team working on cutting-edge automotive solutions.
* Support and learn from real emulation platforms used in production-grade designs.
* Contribute to RTL implementation and gain practical experience in design flows.
* Assist with verification and backend (BE) activities, learning industry best practices.
* Participate in silicon bring-up, seeing your work come to life on real hardware This position is ideal for curious engineers who want to learn fast, take ownership, and grow into a key contributor in the world of automotive semiconductor design.
Requirements:
* B.Sc. in Electrical Engineering (graduate with excellence or a 3rd-year student).
* Strong interest in ASIC / chip design and hardware development.
* Basic understanding of RTL design concepts - an advantage.
* Any exposure to programming or scripting (e.g., Python, TCL, PERL) - an advantage.
* Previous academic or practical experience in relevant fields - an advantage.
* Good English communication skills, both written and verbal.
* Team player with a positive attitude, curiosity, and willingness to learn.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of NVIDIAs industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.
Requirements:
What we need to see:
B.Sc. or M.Sc. in Computer Science, Computer Engineering, or Electrical Engineering.

Total of 5+ years of experience; 3+ years of experience developing software tools for chip design/verification and 2+ years of hands-on experience in chip design or verification.

Proficiency in software engineering, with strong debugging and system design skills.

Strong communication skills and a proactive approach to working with users and cross-functional teams.

Ways to stand out from the crowd:

Proven ability to identify quality or efficiency gaps in design/verification workflows and deliver impactful methodology or automation improvements.

Experience in leading or contributing to cross-team technical discussions to define software solutions.

Passion for building usable tools, with deep understanding of user needs, pain points, and design/verification/debug scenarios.

Takes initiative to explore new ideas and independently drives solutions in ambiguous environments.

Proficiency in Python.
This position is open to all candidates.
 
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13/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.
Requirements:
BSc. in Electrical Engineering or Computer engineering, or equivalent experience.

5+ years of practical verification experience.

Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy).

Experience with Specman is a plus.

Good understanding of RTL design (Verilog).

Strong debugging, problem solving and analytical skills.

Excellent communication and social skills.

Ability to work in a geographically diverse team environment.

Self motivated, independent and target oriented.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Are you passionate about working on a team that is at the cutting and bleeding edge of hardware technology? Our Engineering team works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most sophisticated semiconductor chips. We are looking for an experienced DFT Engineer to join the ATPG team. The position includes taking part in development of the next generation DFT technologies and working closely with a wide range of our groups and aspects - chip design, backend, verification, and production testing.

Working on the most advanced technologies and complex products, our DFT solution are unique and innovative internal developments, and we are continuously improving and evolving the solution to meet the challenging goals. If you find groundbreaking Technologies, and next generation products interesting, then this is the team for you. Take opportunity to join our team for an exciting and educational environment, where every individual has significant contribution to our products and achievements!

What youll be doing:

You will be in charge of state of the art Design for Test/ATPG flows and implementation.

Take full ATPG ownership end to end on a project, from Arch & planning to pattern generation, verification and post Silicon bring up and diagnosis.

Inventing and maintaining automation flows that provide the short test time to production.
Requirements:
What we need to see:

5+ years of hands on DFT/ATPG experience knowledge & technical experience in DFT ASIC Design and in ATPG tools.

Strong programming skills in scripting languages.

BSc. in Electrical Engineering or Computer engineering.

Quick learner, proactive and self-motivated, eager to learn and contribute, sense or ownership, commitment, and responsibility.


Ways to stand out from the crowd:

Knowledge of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.

Experience in Mentor TestKompress ATPG tool and retargeting flow.

Programming languages: TCL, PRL, Phyton & Unix shell scripts.

Experience with ATE and Silicon bring-up.
This position is open to all candidates.
 
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