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חברה חסויה
Location: Ramat Gan
Job Type: Full Time
The SOC verification group owns the important and challenging job of verifying chip.
It is involved from product specification to final SOC delivery, and involves all the system components.
The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You will manage a team of 5 engineers
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.
Requirements:
BSc in electrical engineering, computer engineering or computer science
10+ years of experience working in verification environment, tests, and test bench development (C/C++/SV)
TestPlan defining and Coverage-Driven Verification experience
Fullchip/SOC verification experience, strong system understanding
3rd-party IPs integration testing experience
Waveform debugging with the latest EDA tools, root-cause bugs independently
Knowledge in Industry Standard protocols such as AXI/OCP/APB
SW embedded experience, C/C++ skills - Advantage
Strong skills in scripting Perl/Python - Advantage
System Verilog writing skills, preferably in OVM/UVM - Advantage
This position is open to all candidates.
 
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29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
The role Includes:
Develop ASIC verification environment for full chip, sub-cluster and unit levels. Responsibility for generation and execution of verification plan for challenging digital blocks/chip Development of System Verilog, UVM based protocol/traffic generators, monitors, checkers and coverage, Learn and work with great teammates
Requirements:
B.Sc. in Electrical Engineering from Well-known leading academic institute
Minimum of 2 years of experience in verification from semiconductor companies
Demonstrated experience in building a complicated verification environment
Knowledge and experience in standard verification methodologies such as UVM/OVM- an advantage
Knowledge in Formal verification and Emulation- an advantage
Knowledge in scripting languages such as Python or Perl- an advantage
Very good communication skills
This position is open to all candidates.
 
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29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems. If youre driven by solving problems, some dont yet have names, this is where you want to be.
In this role you will:
Develop and maintain all aspects of the emulation environment- Emulation model, Test plan, Validation environment
The Emulation engineer is involved in validation of significant aspects of ASIC development-chip performance, SW-HW API , system boot and functional flows
Expect to work closely and be part of the development process of the RTL design, verification, software development, testing, and more
Participate in design methodology and tool automation work as needed
Requirements:
B.Sc. in Electrical Engineering from a known university
Minimum of 3 years of experience in front-end development from semiconductor companies
Knowledge and experience in Verilog and/or System Verilog
Experience with Emulation tools
Experience with Synopsys ZeBu emulator-advantage
Familiarity with EDA tools for Lint, Clock domain crossing, simulation, debugging, synthesis and timing analysis-advantage
Knowledge in scripting languages such as Python or Perl-advantage
This position is open to all candidates.
 
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Location: Ramat Gan
Job Type: Full Time and English Speakers
Platform SW department is looking for a highly driven and dynamic SW customer engineer to join our team and help shape the future of Autonomous Driving systems.
Our team ensures fast and successful integration of technologies in customers solutions
(car manufacturers / Tier1), from the design phase to a car launch, while working closely with internal R&D teams. We're looking for a strong, hands-on, software engineer who is passionately motivated by challenges and excels in troubleshooting hard, complex problems.
What will your job look like?
You will work directly with development teams on integration into the car manufacturer's system from a real-time, safety-critical system aspects.
You will be responsible to provide quick and professional analysis and troubleshooting of advanced customer issues.
Support new boards bring up : coding, integration, unit test and customer support..
Integration with various embedded systems
Requirements:
B.Sc in Electrical Engineering, Computer Science or equivalent - must.
5+ years of hands-on experience in of Embedded Linux\RTOS platforms.
Strong proficiency with C\C++ - must.
Solid understanding of SPI, NAND, I2C, and SDRAM - advantage
Experience in Linux user space application development - advantage
Knowledge of Git and GitLab with practical experience - advantage
Experience in Python - advantage.
Outstanding hardware/software debugging skills, using a full range of test equipment
Understanding schematics, experience with logic analyzers, oscilloscopes, and JTAG - advantage
Fluent in English and Hebrew.
This position is open to all candidates.
 
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חברה חסויה
Location: Ramat Gan
Job Type: Full Time and English Speakers
we are looking for a Senior Hardware Engineer to join our AV Platform HW Development group in Israel to design the next generation of autonomous driving systems.
What will your job look like?
Responsible for specifying the hardware for our autonomous driving systems
Lead the HW design process: product specification, electrical schematics, component selection, layout, hands-on testing in a lab environment, verification, accompanying production and qualification processes
Define Signal integrity simulations (LPDDR4, MIPI, FPD-link, etc.), perform power integrity (DC drop, PDN AC analysis) and analog simulations (like spice).
Manage the technical interface with our customers to derive the product hardware requirements
Work in collaboration with all the project disciplines: system architecture, mechanical and thermal, software (networking and algorithms), safety and reliability
Requirements:
BSc Electrical/Electronic Engineering from a known institute
At least 7 years hands-on experience in HW design and manufacturing of electronic products
Proven experience in the full design cycle of a multi-disciplinary product including introduction to mass production
Experience with complex embedded designs, switches, 100/1000/10G eth, ddr, pcie gen 4, can bus, mipi etc
Deep understanding of system level considerations
Customer facing experience
Project management skills, organized and independent, excellent interpersonal skills, team player
Experience with certification/standards design
Fluent in English (spoken and written)
Experience in Automotive HW design - significant advantage
Experience with EMC/Power design - advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time and English Speakers
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
About The Position:
DFT (Design For Test) is a multidisciplinary field which involves many aspects of the chip design process, including: DFT architecture definition, RTL design, verification, backend implementation, STA, pre and post production activities and many more.
You will be part of a growing team that develops from scratch its DFT implementation flow and responsible for all DFT activities and you will closely work with multiple teams within the VLSI group.
Requirements:
Minimum of 5 years experience in the area of DFT
Knowledge of DFT concepts (MBIST insertion and Memory test validation/ Scan insertion, ATPG, coverage analysis)
Experience with Synopsys/Mentor tools and flow
Familiarity with logic design, verification and debug
Experience in scripting languages such as tcl, perl, shell, python, etc.
Experience with high speed interfaces (i.e. PCIe/USB) and/or DDR - an advantage
Excellent communication and team work skills and a very good English is required
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
In this role, you will be:
Responsible for definition and micro-architecture of complicated digital blocks
Detailed documentation and RTL implementation including running EDA tools (Lint, CDC, simulation, debugging, synthesis and timing analysis)
Work closely with verification and architecture team
Participate in design methodology and tool automation work as needed
Requirements:
B.Sc. in Electrical Engineering
Minimum 2 years of experience in logic design from semiconductor companies
Knowledge and experience in Verilog and/or System Verilog
Knowledge of power management techniques for low power design
Familiarity with Clock domain crossing, simulation, debugging, synthesis and timing analysis
Knowledge in scripting languages such as Python or Perl - Advantage
Very good communication skills
This position is open to all candidates.
 
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לפני 6 שעות
Location: Ramat Gan
Job Type: Full Time
CTO Group is looking for experienced Algorithm Researchers and Developers to join our team!
Which department will you join?
The CTO Group is a small, elite group, whose goal is to build next-generation algorithmic solutions powering self-driving car, crowd-sourced HD maps, and advanced driver-assistance systems.
The group is primarily focused on the decision-making module of self-driving car. It leverages a wide range of algorithmic approaches, rigorous formal definitions, and mathematical modeling- enriched by insights drawn from large-scale data and real-world driving experience.
The group is comprised of top-notch developers and researchers and is headed by world-class scientists.
This is a unique opportunity for a passionate technical leader to join the CTO Group, work closely with the CTO on next-generation projects, develop POCs using cutting-edge technologies, shape our technology vision and provide thought leadership to our technical community.
What will your job look like:
Research, design and develop innovative algorithmic solutions.
Mathematical modeling and abstraction of real-life problems.
Code design, implementation, and hands-on development.
Requirements:
5+ years of experience in algorithm development
Outstanding MSc graduate in Computer Science, Computer Engineering, Mathematics, or Physics.
PhD- advantage.
Strong coding skills in C++ and Python.
Outstanding mathematical capabilities
Capable of self-learning scientific articles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 2 שעות
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Join the group that builds the foundation of Mobileyes perception stack. We are looking for a key member to join our Visual GenAI team, dedicated to advancing state-of-the-art research in visual synthesis and Diffusion Models within a high-impact, real-world AV environment.
What will your job look like:
Own the full development lifecycle: from training generative models to adapting existing state-of-the-art architecture for concrete, real-world autonomous driving use cases.
Research, evaluate, and improve GenAI and computer vision models with a focus on scalable and clean Python implementation.
Collaborate with cross-functional teams, including AI researchers and perception teams, to integrate synthetic data into real-world AI applications.
Stay up to date with the latest advancements in AI, Generative Models, and Computer Vision.
Requirements:
M.Sc. or Ph.D. in Computer Science, Electrical Engineering, or a related field.
3+ years of industry experience in Deep Learning and Computer Vision.
Excellent proficiency in Python and PyTorch.
Strong problem-solving, research, and analytical thinking skills.
Advantages:
Experience with Generative AI methods (Diffusion Models, GANs, etc.).
Experience with Vision-Language Models (VLMs) and Multi-modal learning.
Publications in top-tier conferences (CVPR, NeurIPS, ECCV, etc.).
Experience with Linux, AWS, Docker, and virtual environments.
Knowledge of classic computer vision.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
The role includes:
Be part of a founding BackEnd team and tackle greatest technology challenges.
Responsibility for RTL2GDS flow including Floorplan, Synthesis, Place and route, clock-tree, STA, signoff (Timing, DRC, LVS, EMIR)
Take part in the definition of the Backend execution and methodologies.
Requirements:
BSc. Degree in Electrical Engineering
At least 5 years experience as BackEnd engineer from a leading semiconductor company at advanced process technology
Hands-On experience in Macro level Implementation
Hands on experience in physical design flows and methodologies: Synthesis , floor-planning, clock building and routing
Hands on experience with signoff STA, LEC, DRC and EMIR
TCL scripting and EDA tool flow
Full-chip level Implementation - Advantage
Power and Noise analysis - Advantage
DFT knowledge - Advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
29/12/2025
חברה חסויה
Location: Ramat Gan
Job Type: Full Time
Were building the next Gen. AI Factory, at a leading AI Infrastructure technology company. Our products sit at the core of rack-scale computing and define the performance and scale of AI systems.
If youre driven by solving problems, some dont yet have names, this is where you want to be.
In this role, you will:
Establish and lead a Back-End team with emphasis on RTL to GDS flow, Floorplan, Synthesis, Place and route, clock-tree, STA, layout, signoff (Timing, DRC, LVS) and Power
Be responsible for the Backend execution and methodologies
Be responsible to guide and lead contractors
Requirements:
BSc. Degree in Electrical Engineering
At least 5 years experience as BackEnd engineer from a leading semiconductor company at advanced process technology
Proven leadership capabilities and experience
Hands-On experience in both Macro level and full-chip
Power and Noise analysis - Advantage
DFT knowledge - Advantage
This position is open to all candidates.
 
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