דרושים » חשמל ואלקטרוניקה » Principle FPGA Engineer

We are looking for Emulation & Prototyping Engineer
Roles and responsibilities
Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
Map RTL designs to FPGA/emulation platforms.
Develop test environments and infrastructure for HW/SW co-verification.
Support hardware bring-up and software validation on emulation platforms.
Collaborate with verification engineers to run regressions and accelerate debug cycles.
Optimize partitioning, synthesis, and runtime performance on emulation systems.
Work cross-functionally with RTL design, verification, and firmware/software teams.

We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Responsibilities
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

we are looking for a Electrical Post Silicon Validation HW Engineer.
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
* Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
* Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
* Handle all chip validation aspects, including:
* Building validation plans.
* Performing EPSV using advanced test and measurement equipment.
* Writing tests in Python over device SDK.
* Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

Do you want to take part in accelerating the networking solution across our company's product portfolio? our company Co-packaged silicon-photonics group is seeking a dedicated R&D engineer to join our lasers and silicon-photonics validation team. We are seeking a skilled and experienced lasers and electro-optics engineer or physicist to join our team. The ideal candidate will have deep understanding of optics, lasers, and fiber-optic technology, together with expertise in laser testing, characterization, and packaging.
In this role you will participate in laser development for different networking products, including test setup design and test automation, perform tests and characterization of packaged lasers and of optical modules in a system. You will collaborate with cross-functional teams (R&D, verification, architects, FW, electronics, mechanics) internally and externally. This role requires hands-on experience and a deep understanding of optics and laser physics, high-speed testing, excellent Integration, problem-solving skills, and strong communication abilities.
What youll be doing:
Develop, implement and automate testing methodologies and procedures for laser characterization and performance evaluation , including power, wavelength, modulation, and noise measurements.
Document experimental results accurately and clearly present findings.
You will lead the design of verification setups for bringing up and testing the new SiPh transceiver chips.
Develop and implement laser testing methodologies and procedures to perform laser testing and characterization, including modulation and noise measurements.
Provide technical support and assistance to manufacturers of silicon photonics testing platforms.
Troubleshoot and diagnose technical issues related to equipment, processes, and software.
Document experimental procedures, results, and findings accurately and comprehensively.
Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.

looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities
Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.

Required Senior VLSI Backend Engineer
We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up - FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.

our company provides modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. As a Senior HW System Architect, your role will be to work closely with our OEM partners and realize a successful integration of the ADAS to self-driving technology in these platforms. ** This role requires working from our Jerusalem site at least 1 day per week. It also offers the flexibility to work part-time from our other sites, subject to seat availability.
What will your job look like?
Lead end-to-end life cycle of the System architecture - from analyzing OEMs (customers) technical requirements to HW architecture definition, development and verification to ensure integration of our company's products into the vehicle platform.
Work in close collaboration with various groups including algo, HW design, verification, SW architect, Mechanics, and simulations.
Provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
Responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
Provide practical system architecture definition to board designers and SW/algo by managing system external Interconnects and internal interfaces, SoC, MCU, definitions and optimization (based on OEMs requirements and other constraints).

our company provides modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. As a Senior HW System Architect, your role will be to work closely with our OEM partners and realize a successful integration of the ADAS to self-driving technology in these platforms. ** This role requires working from our Jerusalem site at least 1 day per week. It also offers the flexibility to work part-time from our other sites, subject to seat availability.
What will your job look like?
Lead end-to-end life cycle of the System architecture - from analyzing OEMs (customers) technical requirements to HW architecture definition, development and verification to ensure integration of our company's products into the vehicle platform.
Work in close collaboration with various groups including algo, HW design, verification, SW architect, Mechanics, and simulations.
Provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
Responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
Provide practical system architecture definition to board designers and SW/algo by managing system external Interconnects and internal interfaces, SoC, MCU, definitions and optimization (based on OEMs requirements and other constraints).

looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.

Responsibilities
Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.