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לפני 2 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for a Physical Design Engineer
Roles and Responsibilities
Build, maintain, and optimize CAD tools infrastructure supporting both commercial and in-house layout and verification tools (Cadence Virtuoso, Synopsys ICC, Mentor Calibre, etc.).
Develop and automate IC layout flows, including placement, routing, floorplanning, PCells, and tapeout preparation.
Apply advanced software engineering and CAD methodologies to address technical challenges, evaluate architectural and hardware constraints, and deliver scalable automation solutions.
Collaborate with layout, circuit, and verification teams to capture requirements and deploy efficient automation workflows.
Design and implement testing frameworks, regression suites, code review practices and CI/CD pipelines to validate CAD flows, ensure correctness, and improve reliability.
Define, document, and enforce best practices, standards, and procedures; provide technical guidance, training, and support to engineering teams.
Requirements:
B.Sc. in Electrical/Computer Engineering, Computer Science, or Practical Engineering (hands-on IC layout/CAD experience also considered).
1-3 years of relevant industry experience or 3+ years for more senior candidates - both junior and experienced engineers will be considered.
Hands on experience with layout and verification tools, including both commercial (Cadence, Synopsys, Mentor) and in-house CAD solutions.
Strong programming skills in SKILL, Python, TCL, Perl, and Shell (Csh, Bash).
Ability to debug, optimize, and troubleshoot CAD flows and layout workflows.
Familiarity with regression testing, code review, flow validation, and CI/CD practices in CAD/EDA environments.
Strong communication and teamwork skills, with the ability to work independently in a dynamic, fast-paced environment.
Preferred:
Prior experience as a Layout Engineer or EDA/CAD Physical Design Engineer in a semiconductor environment.
Deep understanding of IC physical design and verification flows:
Custom analog/digital layout, floorplanning, placement, routing
DRC, LVS, ERC, parasitic extraction
Physical verification and tapeout readiness
Advanced SKILL programming for layout automation and productivity.
Experience with tapeout preparation, design rule integration, and physical verification.
Knowledge of PCells, parameterized devices, and layout generators.
Proficiency in physical verification runset programming and maintenance, including customization of DRC/LVS/ERC decks and integration into design flows.
Experience building automated regression environments for CAD/EDA flows in SKILL.
Experience with in-house CAD tool development and with the integration and customization of both in-house and commercial solutions.
This position is open to all candidates.
 
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לפני 2 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
Required Senior VLSI Backend Engineer
We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up - FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.
Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
8+ years experience in full chip design.
Experience in leading the full-chip level design and successfully taping out multiple intricate SoCs.
Experience in floor planning, integration, signoff methodologies, and signoff tools for hierarchical designs.
Experience with SoC design practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration.
Expert knowledge of the entire backend design flow from RTL to TO.
Experience with STA (Static Timing Analysis) tools like primetime or tempus.
Experience with IR drop tools like Ansys Redhawk or Volta's.
Physical Verification Expert (DRC/LVS).
Strong independent and motivated to learn quickly, hard-working, and is results oriented.
Good social skills and ability to work collaboratively with other teams.
Preferred
Experience with high-speed serial interfaces such as PCIe, DDR, Ethernet.
Familiarity with advanced DFT flows & tools.
Strong proficiency in scripting language, such as, Perl, Tcl, Python, Make, and automation methods/algorithms.
This position is open to all candidates.
 
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23/11/2025
חברה חסויה
Location: More than one
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of exciting designs. Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part in flow development.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

Deep understanding of all aspects of Physical construction and Integration.

Knowledge in Physical Design Verification methodology LVS/DRC.

Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

2-3 years of relevant experience.

Great teammate.
This position is open to all candidates.
 
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21/12/2025
Location: More than one
Job Type: Full Time
we are looking for a dedicated SoC Clocks Design Automation Engineer to join our Networking Silicon team. In this role, youll focus on developing and supporting clock-related design flows and methodologies for SoC and networking chips, ensuring efficient and high-quality design implementation. Youll also chip in to SoC top-level automation and integration activities, building on existing flow infrastructure to improve efficiency and consistency across projects. Introduction
What you'll be doing:
Develop and maintain design automation and methodologies for SoC and networking clock flows.
Collaborate with design, STA, and project teams to ensure timely and high-quality design closure.
Develop and improve SoC top-level automation scripts and flows built upon existing infrastructure and tools.
Support SoC integration and construction flow activities across multiple projects.
Assist in timing, power, and noise analysis to ensure efficient performance.
Requirements:
B.Sc. or M.Sc. in Electrical or Computer Engineering, or relevant professional experience.
At least 2 years of confirmed experience in SoC design, design automation, or methodology development.
Strong programming or scripting skills in at least one language (Python preferred; Perl, Tcl, or Make are advantages).
Understanding of physical design concepts including placement, routing, timing closure, and ECO implementation.
Familiarity with EDA tools for synthesis, place-and-route, and timing analysis (Synopsys or Cadence flows).
Strong analytical, problem-solving, and soft skills.
Way to stand out from the crowd:
Experience developing or maintaining SoC design or automation flows.
Knowledge of timing-related analysis (crosstalk, noise, delay).
Background in power or timing optimization techniques.
Collaborative attitude with the ability to work effectively across multi-functional teams.
Self-motivated and eager to learn while improving existing design flows.
This position is open to all candidates.
 
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23/11/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are seeking an experienced and motivated CAD Engineer to join our CAD development team. We are looking for candidates with a strong hardware background and robust software skills, passionate about advancing the development and application of non-EDA tools for circuit analysis. This role involves deep studies of circuit behavior at both the standard cell (STDCELL) and block levels, and offers the opportunity to collaborate with multiple teams across us.

What Youll Be Doing:

Develop and maintain CAD solutions for both transistor-level and block-level circuit analysis.

Conduct studies of circuit behavior at both STDCELL and block levels, informing tool development and design improvements.

Work with our quality teams on transistor-level analysis to enhance circuit reliability and performance.

Work with other teams to identify, develop, and deploy advanced CAD solutions addressing design challenges.

Engage directly with design projects, leveraging CAD tools to solve and improve complex circuit design challenges.
Requirements:
What We Need to See:

Bachelors degree in Computer Science, Engineering, or equivalent experience.

Experience in CAD development for circuit analysis.

Hands-on experience with SPICE simulations.

2+ years of experience in VLSI Design Automation.

Strong knowledge of Python programming.

Ways to Stand Out from the Crowd:

Deep knowledge in the circuit domain.

Proven track record of developing innovative CAD solutions.

Understanding of STDCELL internal design and architecture.
This position is open to all candidates.
 
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27/11/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of our industry-leading networking chips highway for the AI revolution.

We're looking for someone who combines strong coding skills with a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end from idea to delivery to support.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Computer Science, Computer Engineering, or Electrical Engineering.

Total of 5+ years of experience; 3+ years of experience developing software tools for chip design/verification and 2+ years of hands-on experience in chip design or verification.

Proficiency in software engineering, with strong debugging and system design skills.

Strong communication skills and a proactive approach to working with users and cross-functional teams.

Ways to stand out from the crowd:

Proven ability to identify quality or efficiency gaps in design/verification workflows and deliver impactful methodology or automation improvements.

Experience in leading or contributing to cross-team technical discussions to define software solutions.

Passion for building usable tools, with deep understanding of user needs, pain points, and design/verification/debug scenarios.

Takes initiative to explore new ideas and independently drives solutions in ambiguous environments.

Proficiency in Python.
This position is open to all candidates.
 
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23/11/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Design Integration Engineer to join our GPU Network Team within the Chip Design Group. This is an exciting opportunity to be part of a growing and expanding team that is shaping the future of GPU networking silicon. Youll work in a dynamic, technology-driven environment where your contributions make a real difference,

with opportunities for growth, learning, and leadership.


Join one of the most desirable employers in the tech industry and help us build the next generation of GPU networking silicon.

What youll be doing:

Drive chip-level integration for advanced GPU networking silicon projects.

Collaborate with architecture, RTL design, verification, FV and physical design teams to ensure seamless integration and optimal performance.

Develop and maintain integration flows, methodologies, and automation to improve efficiency and quality.

Perform RTL synthesis, timing analysis, and support verification and post-silicon activities.

Handle Clock Domain Crossing (CDC) checks and ensure robust design practices.

Work closely with multiple teams across architecture, micro-architecture, backend, and firmware to deliver high-quality silicon.

Contribute to state-of-the-art technologies delivering industry-leading throughput and ultra-low latency for GPU networking solutions.
Requirements:
What we need to see:

B.Sc. in Electrical or Computer Engineering

5+ years of experience in chip design, integration, RTL design and/or verification

Strong knowledge of Verilog /System Verilog and RTL design principles.

Hands-on experience with CDC analysis, synthesis, and timing closure.

Familiarity with EDA tools (Synopsys, Cadence, Mentor) and scripting languages (Python, TCL).

Excellent communication skills and ability to work in a collaborative, fast-paced environment.

Ways to stand out from the crowd:

Knowledge of network protocols, HPC, or distributed systems an advantage.
This position is open to all candidates.
 
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22/12/2025
Location: Yokne`am
Job Type: Full Time
We are looking for a Test Development Engineer to join our team. This role will work as part of a team driven by the development of our company's networking and interconnect products. Do you have a passion for automation development, test program development, code writing and looking for sophisticated and significant topics? We will be happy to have your skills on the team. You will handle various projects across teams, build test plans, automate test specification and execution. You will continuously innovate and develop scalable, reliable, high-performance systems and tools to enable the next generation of Interconnect products.
What Youll Be Doing:
Will work on projects across multiple functional teams from different geographies throughout the product lifecycle
Develop test plans, and execute testing via automation and manually for all supported hardware releases
Work with cross-functional teams across engineering, thermal, mechanical, and HW to identify test requirements
Develop automation and tools for our company hardware releases and test environment
Debug HW & SW failures in interconnect products, Isolate the problem, and get to the root cause
Design and build technical processes to address business issues
Deploy the test solution to the production sites and provide support if needed.
Train personnel on the required processes and operations of complex test systems.
Ensure all testing is being conducted in compliance with all safety protocols.
Requirements:
MSc, BSc in Computer Science, Electrical Engineering, or Computer Engineering, with 3+ years of proven experience
Programming experience in one or more programming languages: Python, Java, C#, C ++
Strong problem-solving, quantitative, and analytical abilities
Ability to work independently and lead projects, highly motivated
Proficient in English, both written and spoken
Excellent communication and presentation abilities
Ways To Stand Out From The Crowd:
Experience with testing/validating large-scale distributed systems with different components
Experience in the usage of standard electrical test equipment which could include: oscilloscopes, spectrum analyzers, and signal generators
Hands-on with electronic platforms including micro-controllers, DSP, with embedded firmware
Proficiency with other programming languages and domains such as C/C++, C#, Linux, etc.
In-depth software development or electronics experience with proven work in writing verification code.
This position is open to all candidates.
 
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לפני 2 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for Emulation & Prototyping Engineer
Roles and responsibilities
Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
Map RTL designs to FPGA/emulation platforms.
Develop test environments and infrastructure for HW/SW co-verification.
Support hardware bring-up and software validation on emulation platforms.
Collaborate with verification engineers to run regressions and accelerate debug cycles.
Optimize partitioning, synthesis, and runtime performance on emulation systems.
Work cross-functionally with RTL design, verification, and firmware/software teams.
Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
4-7 years of experience in FPGA prototyping or emulation of ASIC/SoC designs
Strong understanding of digital design and RTL (Verilog/SystemVerilog/VHDL).
Hands-on experience with at least one emulation/prototyping platform (Palladium, Protium, Veloce, ZeBu, or FPGA-based)
Good knowledge of synthesis, timing closure, and design partitioning for FPGA/emulation.
Familiarity with verification methodologies and environments (UVM/SystemVerilog/C).
Experience with scripting (TCL, Python, Perl, or Shell) for automation.
Strong problem-solving and debugging skills.
Ability to work in a fast-paced, collaborative environment.
Excellent communication and teamwork skills.
Preferred:
Exposure to software bring-up, driver validation, or firmware testing on emulation.
Knowledge of bus protocols (Ethernet, DDR, etc.).
Experience with debug tools (waveform viewers, logic analyzers, or emulation debug frameworks).
Background in SoC architecture and hardware/software co-design.
This position is open to all candidates.
 
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לפני 2 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for Analog Layout Engineer
Roles and responsibilities
Layout design of sensitive analog circuits where you will need to bring state-of-the-art solutions.
In close co-operation with the Circuit Designer, review and analyze complex analog schematics for layout implementation.
Ensures layout designs best functionality and quality by performing all relevant checks like parasitic checks, IR drop and Electromigration, noise and DFM.
Perform post-layout iterations to ensure the best results.
Requirements:
Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering.
2+ years experience in Analog layout
Experience in advanced technology nodes like 7nm and below - advantage.
Proficiency in scripting languages like bash, Perl, Skill, etc.
Prior experience with Cadence Virtuoso environment - advantage
Can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.
This position is open to all candidates.
 
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21/12/2025
Location: Yokne`am
Job Type: Full Time
We are seeking an experienced Power Integrity/PreSi reliability Engineer. As part of our team, you will be working with multiple projects across several teams worldwide. Developing tools, flows and methodologies and their deployment in the projects, working on cutting edge technologies in the scope of the power integrity and reliability.
What you'll be doing:
Working on implementing and developing tools and flows covering IR-drop and Electromigration.
Adapting and designing flows and methodologies to custom project needs.
Ensuring robust power integrity and reliability.
Perform power integrity analysis and mitigation.
Collaborate with other design teams on power delivery strategies.
Requirements:
B.Sc. or higher in Electrical Engineering or related field.
5+ years of experience in power integrity or PreSi reliability engineering.
Proficiency with industry-standard PI tools (e.g. RedhawkSC, Voltus): Hands-on experience with tools from companies as Synopsis, Cadence or other EM simulation tools, including power delivery network (PDN) analysis and design.
Ability to collaborate across teams: Strong interpersonal, communication and teamwork skills, with a track record of working closely with hardware and design teams to implement power delivery strategies.
Adaptability and problem-solving skills: Ability to thrive in a dynamic, fast-paced environment where quick thinking and creative solutions are often required.
Ways to stand out from the crowd:
Experience with creating custom workflows from scratch.
Experience with using AI tools to enhance your capabilities in the power integrity domain.
Proficiency in Python, tcl, or other relevant programming languages for automating analysis or enhancing tool capabilities, and experience with AI programming tools like Cursor.
Demonstrated ability with innovation and creative problem solving.
This position is open to all candidates.
 
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