דרושים » חשמל ואלקטרוניקה » Team Leader, Software Engineering

we are seeking a highly motivated and experienced Senior Software Engineer for a position focused on developing innovative network device monitoring and visualization solution.
Your Impact:
Design and develop visualization capabilities within our SDK environment
Lead the development of a brand-new comprehensive self-monitoring system for network devices from the ground up
Implement a comprehensive model for capturing and managing network state information
Drive cross-team collaboration and technical strategy
Work closely with senior technical leadership
Create and refine technical requirements and system designs
Build new systems and frameworks from the ground up

We are excited to announce that the team is undergoing rapid growth, and we are looking for a C++ Software Developer.
Meet the Team:
Join the team developing a unified silicon architecture for web-scale and service provider networks. silicon team provides an outstanding, unique experience for ASIC and Software engineers by combining the resources offered by a sizable multi-geography silicon organization with the startup culture and breadth of growth opportunities that working in a smaller team can provide.
Your Impact:
Craft and develop software driving the world's most complex infrastructures
Gain intimate knowledge of world-class silicon and programming models
Work with architecture and design teams to define the next generation of ASIC products being developed

We are seeking a highly motivated, energetic, Software Engineer to support our Silicon Photonics Engineering group in Haifa, Israel.
Development occurs in a dynamic and challenging global multi-site environment. However, this is an individual contributor position reporting to the SiPh Engineering Manager in North Reading.
The ideal candidate will play a pivotal role in our dynamic team and will participate in developing complex test solutions for the emerging silicon photonic market at all stages of fabrication, from wafer probe to packaged test. This is a fantastic opportunity to contribute to innovative projects in the field of instrumentation
Utilize extensive C# experience to design, develop, and implement high-quality software instrumentation solutions
Collaborate with cross-functional teams to analyze requirements and deliver robust software applications
Develop scalable, high-performance, high-quality, extensible and maintainable software
Python knowledge is a plus, contributing to the versatility and adaptability of the development team

We welcome AI Researchers, Applied Scientists, Machine Learning Engineers and Software Engineers with experience in large-scale systems and AI/ML to join Foundation AI, a new group focused on developing open-source LLMs (large language models) and other AI technology for cybersecurity.
Here, you will tackle ever-evolving challenges and leverage the dynamic AI landscape to craft solutions that transform the cybersecurity industry. You'll have the chance to build cutting-edge models and AI systems for cybersecurity. You'll gain deep expertise in the fields of both AI and security, engaging with all facets of Generative AI techniques and their deployment in production environments. You will collaborate with a talented team of researchers, engineers and security experts, and play a pivotal role in developing groundbreaking AI solutions. Shape the future of AI for Security with us and make an enduring impact on AI adoption across the world!
Develop and train cutting-edge AI models for the security domain.
Develop a platform for AI data processing, training, fine tuning, evaluation and other AI related needs.
Develop agentic systems that automate and uplift security operations.
Author blog posts, white papers and research papers related to developments in AI for the security landscape.
Collaborate with cross-functional teams of researchers and engineers to translate research ideas into products.
Contribute to our groups culture as an early member of the team.

seeking a Lead Networking Architect to help define and shape the next generation of our AI-SuperNIC scale-out chip.

Scale-out communication is a critical element in building competitive systems for modern data centers. Were looking for an expert with deep networking experience to collaborate closely with our AI/ML, platform and driver software, and VLSI teams in designing an optimized scale-out networking architecture.

If youre passionate about low-latency communication and have a strong background in RoCEv2, HPC communication, and NVMe-oF, this is a unique opportunity to take on a challenging and influential role.

This is a senior, high-impact position at the forefront of technology innovation-driving the development of cutting-edge networking and AI acceleration solutions.

Responsibilities

Work closely with CTO and peer architects to define the product requirements and features of next generation ultra low-latency AI-SuperNIC scale-out chip
Lead adoption of new industry standards such as UEC, UALink while maintaining a competitive solution for RoCEv2
Establish architecture guidelines, requirements, and the division of labor between software, firmware and hardware.
Lead performance estimations, modeling, measurements, and optimizations, as well as system-level integration efforts.
Engage directly with end customers and partners to shape use cases and system solutions.

We are looking for a hands-on, experienced Physical Design Engineer to join us and help define and implement next-generation AI SoC in an advanced technology node

You will play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.

What Youll Do

Take part in shaping methodology and best practices in advanced technologies

Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff

Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification

Define and optimize static timing constraints, area, and power goals at block and top levels

Take part in flow development and automation to improve efficiency and quality of results

we are looking for a ASIC Logic Design Engineering Technical Leader.
our Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

Join the PHY system team, a pivotal part of silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.