דרושים » הנדסה » ASIC/FPGA Verification Engineer #1310

We are seeking a dedicated Firmware Engineer to join our NIC Firmware Core team in Beer-Sheva/Tel-Aviv. You will contribute to the development of brand-new networking adapter technologies, elevating the performance of current and future NVIDIA devices. NVIDIA develops innovative and next-generation networking devices that are known for their outstanding performance and power efficiency. The position involves all aspects of firmware development, including design, micro-architecture, software interfaces, and verification. We are seeking a dedicated and motivated engineer who will contribute to the development of advanced technology Network Adapters. You will also have the opportunity to create features for leading cloud computing providers and high-performance computing networks.

What youll be doing:

Take a part in the design, development, test, debug, and optimization of low-level firmware layer on next-generation network adapters up to package release.

Analyze, integrate, support, and debug low-level firmware layer on verification environments.

Collaborate with firmware, software, and architecture teams to analyze, design, and debug legacy and new low-level firmware flow.

Improve our team processes including design and implementation of new methodologies, automated processes.

We are now looking for a Senior Security Validation Architect for Networking AI Platforms! NVIDIA is seeking an outstanding security architect with deep expertise in security validation and advanced testing methodologies to help design, build, and guide secure validation across our next-generation products. The candidate is expected to deliver highly innovative validation and verification solutions that lead to significant industry differentiation and help achieve the long-range goals of the Security organization. Leaders in this role will strengthen NVIDIAs Data Center and networking products against emerging threats while driving adoption of future-proof security validation technologies.

What youll be doing:

Defining and driving implementation and adoption of security validation strategies across NVIDIAs networking platforms security solutionsspanning Silicon, Firmware, and System levels.

Designing frameworks and automation flows to test and verify security functionality during product QA, large-scale manufacturing, and in-field operation.

Collaborating with architecture, design, and product engineering teams to ensure robust verification coverage for hardware roots of trust, secure boot, key provisioning, and cryptographic services.

Driving development of advanced validation and debugging tools capable of detecting complex security anomalies, misconfigurations, and behavioral deviations across systems.

Building and maintaining an end-to-end visibility architecture for security validation metrics, enabling continuous trust across the product lifecycle.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of exciting designs. Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part in flow development.

We are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.


What you will be doing:

STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.

Taking part inflows development.