דרושים » מדעים מדוייקים » Chief Scientist

Required Chief Scientist
Description:
A rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a sensor free approach to smart infrastructure. The company is VC backed and in the revenues stage.
Combining pioneering technology in optical fiber sensing with state-of-the-art machine learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
The Chief Scientist is the companys top expert on physics, fiber sensing, and scientific innovation. This role shapes our core technologyfrom hardware and sensing architecture to research leadership and IP strategy. It combines deep technical expertise in DAS with hands-on leadership across science, engineering, and innovation.
The Physics Team Leader will report to the VP R&D.
What Youll Do:
Own and lead the development of our next-generation fiber-sensing systems, driving innovation from concept through production.
Manage and grow a multidisciplinary team of physicists, providing technical mentorship and day-to-day leadership.
Oversee cross-functional hardware development, including: optical system design and
integration, electrical board design, thermal design of enclosures and components.
Serve as our subject matter expert in fiber sensing in general and DAS in particular and in geophysics and seismology.
Lead scientific research and collaboration, including academic partnerships and publications in those fields.
Lead our IP and patent strategy and build its IP Portfolio, including drafting and managing patent applications.
Lead system-level architecture decisions, integrating optical, mechanical, electrical, and computational elements to deliver reliable, high-performance systems.
Collaborate closely with algorithm, software, and field engineering teams to ensure smooth integration and deployment of hardware in real-world environments.

Prisma-Photonics is a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a “sensor free” approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art machine learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly. The Chief Scientist at Prisma is the company’s top expert on physics, fiber sensing, and scientific innovation . This role shapes Prisma’s core technology—from hardware and sensing architecture to research leadership and IP strategy. It combines deep technical expertise in DAS with hands-on leadership across science, engineering, and innovation. The Physics Team Leader will report to the VP R&D.

What You’ll Do:

* Own and lead the development of our next-generation fiber-sensing systems , driving innovation from concept through production. Manage and grow a multidisciplinary team of physicists , providing technical mentorship and day-to-day leadership.
* Oversee cross-functional hardware development , including: optical system design and
* integration, electrical board design, thermal design of enclosures and components.
* Serve as Prisma’s subject matter expert in fiber sensing in general and DAS in particular and in geophysics and seismology
* Lead scientific research and collaboration , including academic partnerships and publications in those fields.
* Lead Prisma’s IP and patent strategy and build its IP Portfolio , including drafting and managing patent applications.
* Lead system-level architecture decisions, integrating optical, mechanical, electrical, and computational elements to deliver reliable, high-performance systems. Collaborate closely with algorithm, software, and field engineering teams to ensure smooth integration and deployment of hardware in real-world environments.

What You Bring::

* Advanced degree (Ph.D. – strong preference) in Experimental Physics, Electrical Engineering, or a related field.
* 5+ years of hands-on experience in lasers, optical communication, fiber lasers, or complex electro-optical systems.
* Proven experience in leading high-performing technical team and delivering successful hardware projects to production.
* Deep understanding of physical system design and integration, especially optical systems.
* Track record of delivering production-grade hardware, including enclosures and computing components.
* Strong interdisciplinary mindset—able to navigate physics, engineering, and software.
* Creative, problem solver with a practical, execution-oriented approach.
* Excellent communication skills.
* Passion for working in a fast-paced, collaborative startup environment.

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within QM spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are seeking a Digital Electrical Design Engineer with extensive experience in high-speed interfaces and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D teamguiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites.
Key Responsibilities:
FPGA coding Low-Level HW Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
Board Design Experience: Own the entire hardware lifecyclefrom concept and schematic design in Altium to layout review, testing, and production release.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardwarefirmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our server chip design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Technical Leadership and mentor team members.
Communicate and work with multi-disciplined and multi-site teams.

The Senior Manufacturing Test Engineer is responsible for developing, implementing, and sustaining test processes and equipment used in the manufacturing of hardware products. This role ensures that products meet quality, reliability, and performance standards through robust test strategies, automation, and continuous improvement. The engineer acts as a bridge between design engineering, manufacturing operations, and quality assurance, supporting new product introductions (NPI) through to mass production and sustaining phases.
This is a great opportunity to be part of one of the fastest-growing AI infrastructure companies in history, an organization that is in the center of the hurricane being created by the revolution in artificial intelligence.
we are the data platform company for the AI era. We are building the enterprise software infrastructure to capture, catalog, refine, enrich, and protect massive datasets and make them available for real-time data analysis and AI training and inference. Designed from the ground up to make AI simple to deploy and manage, our company takes the cost and complexity out of deploying enterprise and AI infrastructure across data center, edge, and cloud.
Our success has been built through intense innovation, a customer-first mentality and a team of fearless company ronauts who leverage their skills & experiences to make real market impact. This is an opportunity to be a key contributor at a pivotal time in our companys growth and at a pivotal point in computing history.
Role and Responsibilities:
Test Development & Validation
Design, develop, and implement test plans, test fixtures and infrastructure.
Collaborate with R&D to define test requirements early in the product lifecycle.
Develop test scripts and automation software (Python, LabVIEW, C#, etc.) to improve coverage and efficiency.
Validate test coverage, yield, and reliability through statistical analysis (GR&R, Cpk, SPC).
New Product Introduction (NPI)
Support EVT, DVT, and PVT phases with test readiness and execution.
Lead test process transfer to contract manufacturers (CMs) or ODM partners.
Train CM engineers/technicians on test systems and procedures.
Ensure compliance with safety, regulatory, and customer requirements.
Manufacturing Support & Continuous Improvement
Monitor production test yields, debug failures, and drive root cause analysis (RCA).
Implement corrective actions and continuous improvements to reduce test time, cost, and false failures.
Maintain and calibrate test equipment and fixtures.
Support ECO (Engineering Change Orders) by updating test plans and equipment accordingly.
Cross-Functional Collaboration
Work closely with hardware, firmware, and reliability engineers to improve product testability and robustness.
Partner with Quality and Operations to ensure smooth scaling into mass production.
Engage with suppliers and CM partners on test strategy alignment.

we are a global leader in quantum computing control systems. Through our pioneering hardware and software solutions based on instruction-based quantum control, we're revolutionizing how quantum computers are built and controlled. As we stand at the forefront of exponential growth in quantum computing, we're assembling an elite team that actively shapes the evolution of quantum technologies.
We are seeking an exceptional architect to join our Architecture team and help shape the future of quantum computing. As quantum computers near production scale, were uniquely positioned to define the system and software architecture that will power the next generation of computing.
In this role, you will be responsible for end-to-end definition of new capabilities, from the quantum programming languages through the compilation processes to the pulse processor. This position demands deep expertise in software architecture across all levels, an ability to work closely with logic design teams, a strong ability to learn and adapt, and a passion for becoming an expert in quantum computing. Youll collaborate closely with Product, R&D, and Research teams to transform ideas into technical reality.
Responsibilities
Design quantum control programming languages and representations optimized for our unique hardware and application requirements
Define architecture in our unique pulse processor end-to-end, from language and software interface to logic capabilities
Define system-level architecture and features, and provide comprehensive specifications for R&D implementation
Collaborate cross-functionally across Software, Compiler, Logic Design, and Quantum Software teamsfrom concept to production
Work hand-in-hand with Product and Research teams to translate high-level requirements into concrete architecture plans
Development of Proof-of-Concepts for new software capabilities and features.

We are seeking a highly motivated Chip Architect to join our team and help shape the future of next-generation high-performance networking. our companys next-generation Ethernet and NVL switches are at the core of the worlds most advanced compute clusters from powering AI factories to scaling NVL-based GPU systems used in training/inferencing of the largest foundation models. As a Chip Architect at our company, you will play a central role in defining the architecture of these high-bandwidth, low-latency switches. Your work will directly impact how AI supercomputers, hyperscale data centers, and cutting-edge research platforms communicate at scale. You will join a team with a strong track record of first-in-the-world products and help deliver the next leap in networking technology.
What You'll Be Doing:
Define the end-to-end architecture and full feature set of next-generation NVL and Ethernet switch chips across all stages of the product lifecycle from early concept to deployment.
Develop architectural specifications and design guidelines, and drive trade-off analyses across multiple architecture options.
Lead research and exploration of future architectures, including innovation that contributes to patent development.
Collaborate closely with cross-functional teams including other architecture groups, logic design, firmware, system software, and research to ensure successful execution and integration.
Act as a technical leader and subject matter expert, mentoring others and driving architectural excellence across the organization.

We are seeking a highly motivated Chip Architect to join our team and help shape the future of next-generation high-performance networking. our companys next-generation Ethernet and NVL switches are at the core of the worlds most advanced compute clusters from powering AI factories to scaling NVL-based GPU systems used in training/inferencing of the largest foundation models. As a Chip Architect at our company, you will play a central role in defining the architecture of these high-bandwidth, low-latency switches. Your work will directly impact how AI supercomputers, hyperscale data centers, and cutting-edge research platforms communicate at scale. You will join a team with a strong track record of first-in-the-world products and help deliver the next leap in networking technology.
What You'll Be Doing:
Define the end-to-end architecture and full feature set of next-generation NVL and Ethernet switch chips across all stages of the product lifecycle from early concept to deployment.
Develop architectural specifications and design guidelines, and drive trade-off analyses across multiple architecture options.
Lead research and exploration of future architectures, including innovation that contributes to patent development.
Collaborate closely with cross-functional teams including other architecture groups, logic design, firmware, system software, and research to ensure successful execution and integration.
Act as a technical leader and subject matter expert, mentoring others and driving architectural excellence across the organization.

our company's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our companys needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
In this role, you will work with system teams and the CPU Architecture team to develop an understanding of the Central Processing Unit (CPU), System on a Chip (SoC), performance metrics, benchmarks/measuring tools, and available optimization knobs. You will define methods and technologies to model CPU performance at different accuracy levels by supporting architectural explorations and decision making. You will correlate performance projections with measured post-silicon data.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Write product or system development code.
Design, develop, test, deploy, maintain, and improve Central Processing Unit (CPU) software modeling and other software tools.
Manage project priorities, deadlines, and deliverables.
Collaborate with hardware and software CPU architecture teams, SoC performance modeling team, and other company Software teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing ASICs used to accelerate networking in data centers. You will have dynamic, multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.
You will be responsible for performance analysis for an end-to-end networking stack using your knowledge.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead a complex ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement data center networks.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.