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לפני 18 שעות
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
our company's networking VLSI team is looking for a CAD engineering manager. The team is providing methodologies and vendor-based EDA flows for the physical design execution teams. Your team will be responsible for defining and developing methodologies and flows that enable high quality and super-efficient execution of over a hundred physical design engineers. You will be working closely with the physical design technology team, with design engineering professionals and project leads, and with peer software/CAD teams at our company, hence you will need to possess strong interpersonal skills, be a quick learner, and manage multiple missions in a results-oriented manner. You, along with the team, will lead processes from requirements understanding, through software definition and implementation of tools/flows, ending with release, integration and support.
What you'll be doing:
Lead a growing team of ~5 professional CAD engineers.
Own the definition, development, and maintenance of software solutions for physical design engineering.
Collaborate and closely interact with design technology experts and execution engineers, along with software/CAD peers.
Influence and make right choices to produce high quality and tangible impact.
Be agile and make continuous and incremental progress by decomposing the problem in to smaller and achievable goals
Define and build strategic vision for the networking VLSI technology and EDA team.
Requirements:
B.Sc. in Computer Science or Electrical Engineering
8+ overall years of EDA/CAD/software development experience
2+ years of team management experience
Experience with vendor tools (Synopsys, Cadence etc)
Proficient at scripting: Perl, Tcl, Python, shell etc.
Familiar with revision control systems.
This position is open to all candidates.
 
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לפני 19 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Team lead to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Leading and mentoring Physical Design-Backend team.
Physical design of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Taking part inflows development.
Take part in project definition towards POR, close interaction with other domains such as FE, ARCH.
Requirements:
B.SC./ M.SC. or equivalent experience in Electrical Engineering/Computer Engineering.
2+ years of managerial experience.
6+ overall years of experience in physical design.
Proven experience in RTL2GDS flows and methodologies.
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317777
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לפני 17 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Manager to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
We are looking for a highly experienced and motivated Physical Design Manager to lead a team of 1015 engineers as part of our IP development organization. This is a strategic leadership role requiring both deep technical expertise and strong people management skills.
What you will be doing:
Lead and manage a team of 1015 Physical Design engineers, guiding them through all stages of development.
Oversee four concurrent projects, from planning through execution and delivery, working on high-performance and cutting-edge technologies.
Drive technical excellence in floorplanning, synthesis, place & route, timing closure, and physical verification (LVS/DRC).
Collaborate with cross-functional teams, including front-end design, verification, SoC integration, and packaging.
Mentor team members, promote a culture of continuous improvement, and support professional growth.
Ensure timely delivery of project milestones while maintaining high-quality and performance targets.
Requirements:
B.Sc. in Electrical Engineering or a related field; M.Sc. is an advantage.
Minimum of 7 years of hands-on experience in Physical Design.
At least 3 years of proven managerial experience in leading PD teams.
Solid understanding of tools and methodologies in physical implementation (e.g., Synopsys, Cadence, timing analysis, DRC/LVS).
Strong organizational and multitasking skills; ability to manage complex, parallel development streams.
Excellent communication and interpersonal skills.
Fluent in English both written and verbal.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 16 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are at the forefront of AI-driven innovation in VLSI design automation. Join us to shape the future of semiconductor design with cutting-edge AI tools and make a significant impact in a collaborative, high-performance environment. Are you ready to push the boundaries of whats possible in VLSI CAD? Come be part of our pioneering team!
What you'll be doing:
You will be responsible for developing and integrating advanced CAD solutions and automation flows using AI and machine learning for VLSI design, verification, and implementation.
Work closely with design, verification, and CAD teams to identify areas for improving VLSI workflows using advanced tools and methods.
Research, prototype, and deploy AI-based algorithms.
Develop and maintain scripts and automation infrastructure to enable seamless adoption of AI tools in the VLSI design process.
Continuously review emerging AI technologies and methodologies to keep our CAD environment up-to-date.
Provide technical support and training to engineering teams on AI-enabled CAD flows and best practices.
Requirements:
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of experience in VLSI CAD tool development, with a strong focus on integrating AI/ML techniques into EDA workflows.
Proficiency in Python and at least one AI/ML framework (such as TensorFlow, PyTorch, or scikit-learn).
Hands-on experience with VLSI physical design and familiarity with industry-standard EDA tools (e.g., Synopsys, Cadence).
Knowledge of data preprocessing, feature engineering, and model deployment as applied to VLSI design challenges.
Experience developing and maintaining automation scripts (Python, Perl, Tcl, Make).
Strong analytical skills in evaluating the impact of AI solutions on design quality, performance, and productivity.
Excellent communication skills and the ability to work cross-functionally in a fast-paced environment.
Self-motivation, attention to detail, and a track record of delivering robust solutions to production.
Ways to stand out from the crowd:
Demonstrated experience deploying AI/ML models in production VLSI CAD environments.
Contributions to open-source AI/EDA projects or publications in relevant conferences/journals.
Deep understanding of VLSI design challenges-such as timing closure, power optimization, or yield enhancement-and how AI can address them.
Experience with cloud-based or distributed compute environments for large-scale AI training and inference.
Strong ownership, curiosity, and a passion for continuous learning and innovation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8318297
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לפני 19 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
At our company, you will be joining a team of dedicated Physical Design Engineers who excel in developing high-speed communication devices. Our team is recognized for delivering highly efficient and low-latency products. Join us to contribute to groundbreaking chips in a professional environment. This is an ambitious role where you will compete and excel in a collaborative environment.
You will be empowered to determine and successfully implement world-class solutions. Join us to be part of a team where your work will be flawless, and your career will thrive in our encouraging and inclusive culture. our company has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!
What you'll be doing:
Learn and implement the complete place & route flow, using sophisticated software tools.
Be responsible for the physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed to and work on a variety of exciting designs, including high cell count and high frequency blocks, resolving timing and congestion problems.
Engage in the complete design chip development flow (RTL2GDS) including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
Knowledge in physical design flows and methodologies (PNR, STA, DRC, IR) - Advantage.
Deep understanding of all aspects of physical construction and integration.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
2-3 years of relevant experience.
Proven ability to work as a great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317729
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 18 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company's System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Designing and implementing SOC level clock requirements
Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
3+ years of confirmed experience in chip design
Shown hands on physical design skills in clock distribution in tight multi power and timing/layout constrained products.
Proficiency in at least one common scripting languages like perl, python, bash, Tcl.
Phenomenal teammate.
Ways to stand out from the crowd:
Passion for quality. Experience with delivery back to RTL, to physical design, and other customers.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8318009
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 20 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for a best-in-class STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
Be in charge of full-chip/Chiplet level STA convergence from early stages to signoff.
Take part in floor plan design and Netlist creation with aim to optimize timing convergence and work efficiency.
Define and optimize, together with CAD, STA signoff flows and methodologies.
Digital Partitions' and analog IPs' timing integration, giving feedback and driving convergence.
Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including optimizing them for runtime and efficiency.
Requirements:
B.SC./ M.SC. in Electrical Engineering/Computer Engineering.
2+ years of experience in physical design and STA
Proven experience in RTL2GDS and STA flows and methodologies.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.) and timing signoff (Primetime).
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317696
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 19 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you'll be doing:
Responsible for chip floorplan and pins placement
Running, debugging and approve Physical verification flows across multiple projects
Perform physical layout planning and optimization.
Requirements:
B.SC./ M.SC. in Electrical Engineering
At least 5+ years of hands-on layout design experience
Strong background of Physical Design Verification methodology LVS/DRC
Knowledge in physical design flows and methodologies (PNR, STA, physical verification)
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc..)
Great teammate.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317712
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 19 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
we are seeking an exceptional Senior Software Manager to join the System Production Engineering group. In this role, you will be instrumental in shaping the next generation of system production solutions for NICs, Smart NICs/DPUs, and Network Switches. You will lead a team of engineers to develop and deliver cutting-edge production test solutions that ensure the highest quality for every company Networking system shipped to customers. Collaborating closely with engineers, hardware and software architects, R&D teams, and external partners, including production lines, you will drive innovation and excellence in software development methodologies. Your leadership will elevate software quality standards within the group while enhancing the team's technical capabilities. At our company, we have assembled a team of extraordinary individuals whose mission is to push technological boundaries and define the platforms of the future. Join us in driving innovation at the forefront of networking solutions.
What Youll Be Doing:
Team Leadership and Development: Guide, mentor, and expand your engineering team, ensuring effective planning and execution of projects while maintaining high standards of quality and performance
Cross-Functional Collaboration: Work closely with Product and Program Management, Engineering and Production line teams, and HR to achieve business objectives, enhance user experiences, and develop user-friendly production test content
Product Lifecycle Management: Oversee the complete product lifecycle, including design, development, build, and enhancement of networking systems test software
Strategic Planning and Execution: Define product features and roadmaps, understand product strategy and market positioning, and drive products to successful completion and deployment
Quality Assurance and Testing: Review architectural designs (electrical, mechanical, process, software) of tested units to identify potential design issues and ensure robust and efficient production, resulting in high-quality products for customers
Risk Management and Issue Resolution: Identify and mitigate risks, resolve issues affecting project scope, schedule, and quality, and continuously improve processes and procedures within the team to streamline operations
This role demands a combination of strong leadership skills, technical expertise in software and hardware systems, and the ability to collaborate effectively across various departments to drive the development and delivery of cutting-edge products.
Requirements:
B.Sc. or M.Sc. in Computer Engineering, Computer Science or Electrical Engineering (or equivalent experience)
10 years of experience in software development, test automation, or system validation
5+ years of team management experience in building and leading highly performing teams
Strong programming expertise in Python for system-level development
Experience with production test development and automation frameworks
Knowledge of Linux systems, embedded software, and firmware development
Familiarity with hardware/software co-design, debugging, and system bring-up
Proven ability to lead and mentor software engineering teams
Strong experience in driving software development methodologies, CI/CD pipelines, and DevOps practices
Ability to work closely with hardware engineers, software architects, R&D teams, and production teams. Strong problem-solving skills and the ability to manage complex, cross-functional projects.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8317826
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 17 שעות
Job Type: Full Time
we are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of our company's product lines working with all our company groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our design team, you will be responsible for the design and implementation of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.
What you will be doing:
Participate in micro-architecture development and document specifications.
Implement in RTL and work with the verification team to ensure that the design is functional.
Apply logic design skills to optimize and meet performance and power goals.
Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
A Bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in chip design development of complex designs
Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.
Good interpersonal skills. And team player.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8318055
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 19 שעות
חברה חסויה
Location: More than one
Job Type: Full Time
we are looking for best-in-class STA Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
STA analysis of blocks/top-level according to specifications under challenging constraints targeting for the best power, area, and performance.
Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.
Daily work involves all aspects of static timing analysis - constraints, environment, models generation and timing ECO generation for block level and full chip level.
Taking part inflows development.
Requirements:
B.SC. in Electrical Engineering/Computer Engineering.
2-3 years of experience as STA engineer.
Ability to quickly adapt to new technology and go deep into new areas
Strong communication skills
Great teammate.
Drive new solutions based on any issues that arise
Ways to Stand Out From the Crowd:
Knowledge in physical design flows and methodologies (PNR, STA, physical verification).
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317724
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