דרושים » מדעים מדוייקים » Senior VLSI Verification Engineer

משרות על המפה
 
בדיקת קורות חיים
VIP
הפוך ללקוח VIP
רגע, משהו חסר!
נשאר לך להשלים רק עוד פרט אחד:
 
שירות זה פתוח ללקוחות VIP בלבד
AllJObs VIP
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 7 שעות
Location: Caesarea
Job Type: Full Time
We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.

Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM.
Requirements:
7+ years of experience as a Verification Engineer.

B.Sc./M.Sc. degree in electrical/computer engineering from a leading university.

Experience in pre-silicon functional unit level/fullchip verification.

Experience in leading block/cluster verification from scratch.

Experience in System Verilog UVM.

Experience in verification of complex SoC and designs.

Experience with AMBA protocols and NOC subsystem is an advantage.

Experience with CPU subsystem is an advantage.

Experience with PCIe is an advantage.
This position is open to all candidates.
 
Hide
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8218951
סגור
שירות זה פתוח ללקוחות VIP בלבד
משרות דומות שיכולות לעניין אותך
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 10 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
the team that invented one of the technologies at the heart of 5G. Their next vision was to develop an IoT sticker, a computing element that can power itself by harvesting radio frequency energy, bringing connectivity and intelligence to everyday products and packaging, things previously disconnect from the IoT. This revolutionary mixture of cloud and semiconductor technology is being used by some of the worlds largest consumer, retail, food and pharmaceutical companies to change the way we make, distribute, sell, use and recycle products.
Our investors include Softbank, Amazon, Alibaba, Verizon, NTT DoCoMo, Qualcomm and PepsiCo.

looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.

Responsibilities
Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered)
Self-motivated, ability to work, lead and drive tasks to completion.
Great interpersonal skills.
Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, and Unix/Linux environments, scripting languages (Python, etc.) and version control.
Advantages
2+ years of managerial experience. (Only for DV lead)
Knowledge in Low Power technics and UPF standard.
Knowledge with Mix signals SoCs.
Knowledge with SW/HW Co-development
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8218553
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
We are looking for a Senior CAD Physical Design Engineer.
WHAT YOU'LL DO:
You'll be joining our Physical Design team , which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
A VLSI Design Engineer with extensive experience in backend design
B.Sc./M.Sc. in Electrical Engineering
Strong understanding of Place & Route flow
PREFERRED QUALIFICATIONS:
Deep understanding of all aspects of Physical construction and Integration
Knowledge in Physical Design Verification methodology LVS/DRC
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.)
Great teammate, self-learning skills, and ability to work autonomously
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194954
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are looking for a Senior Verification Engineer.
What You'll Do:
You'll join the Front-End Design team Silicon One, responsible for all chip design processes from definition and microarchitecture to final product.
Our design engineers engage in every aspect of chip design: definition, design, verification, signoff, and validation through to production.
We apply the latest silicon technologies and processes to build the largest-scale and most sophisticated devices, pushing the boundaries of feasibility.
Requirements:
5+ years experience in digital logic design verification
Advanced knowledge of SystemVerilog and UVM
Advanced debug skills pre-silicon and in-lab
Preferred Requirements:
Scripting abilities
System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
Basic SW knowledge (chop driver level)
Basic design knowledge
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194798
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are looking for a Physical Design Team Leader.
What You'll Do
You'll be joining our Physical Design team, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.
Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning
We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
A VLSI Design Engineer with extensive experience in backend design.
B.Sc./M.Sc. in Electrical Engineering.
Strong understanding of Place & Route flow.
Preferred/Advantageous Qualifications:
Deep understanding of all aspects of Physical construction and Integration.
Experience in Leading Physical Design Projects
Leadership and mentoring skills
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194985
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
We are looking for a Senior Asic Design - Silicon One.
You'll join the Front-End Design team Silicon One, responsible for all chip design processes from definition and microarchitecture to final product.
Our design engineers engage in every aspect of chip design: definition, design, verification, signoff, and validation through to production.
We apply the latest silicon technologies and processes to build the largest-scale and most sophisticated devices, pushing the boundaries of feasibility.
Requirements:
5+ years experience in digital logic design verification
Advanced knowledge of SystemVerilog and UVM
Advanced debug skills pre-silicon and in-lab
Preferred Requirements:
Scripting abilities
System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
Basic SW knowledge (chop driver level)
Basic design knowledge
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194784
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: Caesarea
Job Type: Full Time
Join the team in developing a unified silicon architecture for web-scale and service provider networks.
the team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, café, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.
Your Impact:
Define devices and deliver specifications to other development teams.
Work with internal and external customers to understand and define current and future requirements.
Innovate at all levels to deliver market-first features and solutions.
Conduct in-depth research to shape the architecture of next-generation networking devices.
Contribute to full-chip integration and cross-functional collaborations to enhance design methodology.
Participate in the definition and analysis of networking system solutions, ensuring they meet market and technical needs.
Requirements:
Bachelor's Degree in Electrical Engineering, Computer Engineering, or a related field.
Strong analytical and research skills with a deep theoretical background in networking.
Experience in system-level architecture and ASIC design process.
Proficiency in software development (C++, Python).
Strong ability to learn and grasp new concepts from papers and specifications.
Excellent presentation and communication skills to convey complex technical ideas effectively.
Proven ability to work independently and drive initiatives without managerial oversight.
Preferred Qualifications:
Experience researching networking solutions and developing innovative system architectures.
Familiarity with silicon design methodologies and the verification/debugging process.
Strong documentation skills for creating technical specifications and architectural documentation.
Ability to collaborate within a team and contribute to collective goals.
Attention to detail to ensure precision in system-level solutions and architectural decisions.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194862
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
We are looking for a ASIC Modeling Architect Engineer.
What You'll Do:
You'll join our architecture team, central to silicon development.
You will define features of future devices using the latest silicon technologies, focusing on Logic Design and coding.
You will be responsible for defining the device specification.
Requirements:
Electrical engineer with 5 years experience.
Strong Logic Design and coding skills -
Strong understanding of networking principles and protocols
Preferred Qualifications:
Proficient in SW development (C++, Python) - nice to have .
Quick to learn new concepts and technologies.
Effective communicator and presenter.
Strong technical documentation skills.
Meticulous attention to detail in networking system solutions.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8194948
סגור
שירות זה פתוח ללקוחות VIP בלבד