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Location: Haifa and Hod Hasharon
Job Type: Full Time
We are looking for an experienced architect with deep technical expertise in high-speed SERDES interfaces and extensive experience working with IEEE standards such as 802.3 (including subgroups like 802.3ck and 802.3cw).
The ideal candidate will have a background in various generations of Ethernet technologies, including lower speeds from prior generations (e.g., 100G, 200G) and will play a pivotal role in pushing the boundaries of high-speed data transmission, aiming to achieve 448Gb lane speeds and beyond.
This role will involve conducting in-depth research, driving industry standardization efforts, and collaborating closely with industry partners and peers to spearhead technological advancements.
Requirements:
5+ years of experience in high-speed SERDES design, implementation, or research, with hands-on involvement in previous generations of Ethernet standards (e.g., 100G, 200G, 400G).
Proven experience with IEEE 802.3 working groups and standards, particularly in areas related to Ethernet and optical PHY layer technologies (e.g., 802.3ba, 802.3bs, 802.3cd, 802.3ck)
Deep knowledge of modulation techniques such as PAM4 and NRZ, as well as high-speed signaling protocols used in both optical and copper interconnects
Expertise in physical layer research, signal integrity, channel modeling, equalization and error correction techniques for high-speed links
Experience working with key industry players, vendors, and consortiums to shape standards and drive technology adoption
Strong ability to produce technical reports, white papers, and presentations that distill complex technical information into actionable insights
How would you stand out:
Advanced Degree: Masters or PhD in Electrical Engineering, Communications Engineering, or a related field
Expertise and knowledge in in PCS/PMA sublayers, GMII Interface and MAC (Media Access control) in IEEE 802.3.
Extensive involvement in developing Ethernet standards from 100G up to 400G, with insights into the evolution toward 800G and Terabit Ethernet
Demonstrated leadership in managing cross-functional engineering projects related to PHY layer technologies and SERDES interface innovation
Previous experience presenting at or contributing to major industry conferences and events (e.g., OFC, ECOC, IEEE Ethernet Alliance meetings).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-specific integrated circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, assisting in the hardware and lab bring up, and verification of our ASIC systems.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic Design Automation (EDA) tools, licensing, and job management in our company infrastructure.
Support emulation team members with debugging hardware, tooling, and project specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms, and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
Experience with associated Electronic Design Automation (EDA) tools, with automation and flow enhancements.
Experience using command debug tools (e.g., Verdi, SimVision/Indago, GDB) and programming in C, C++, Perl, TCL, or Python.
Experience with emulation systems, maintenance, upgrades, and methodology enhancements.
Preferred qualifications:
Master's degree in Computer Science, Electrical Engineering, or a related technical field.
Experience deploying Electronic Design Automation (EDA) tools into distributed environments.
Experience with system administration, networking, and security systems.
Experience with Register-Transfer Level (RTL) design, Verilog, simulation, System Verilog, and assertions.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use Application-Specific Integrated Circuit (ASIC) design to be part of a team that creates the System on a Chip (SoC) design cycle from start to finish. You will collaborate with design and verification engineers in projects, creating architecture definitions with Register-Transfer Level (RTL) coding, and running block level simulations. You will contribute in ASIC designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and more to specify and deliver high quality SoC/RTL. You will also solve technical issues with innovative micro-architecture and practical logic solutions, and evaluate design options with performance, power, and area in mind.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Own Networking Internet Protocols (IP's) Design team including definition, implementation and deployment.
Define IP development methodologies sharing unified blocks within the IP design team.
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Demonstrate technical involvement throughout the entire Intellectual Property (IP) development cycle, ensuring seamless integration into System-on-Chip (SoC).
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
10 years of experience with design from micro-architecture through implementation with Verilog/SystemVerilog, or VHDL language.
10 years of experience in managing teams and groups.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience with chip design flow, chip architecture, design methodologies, physical design, and verification processes.
Preferred qualifications:
Master's degree or PhD in Engineering or equivalent practical experience.
Experience in leading chip development projects and teams and execution.
Ability to motivate and focus on collaborative teams to achieve testing goals.
This position is open to all candidates.
 
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05/06/2025
Location: Haifa
Job Type: Full Time
We are looking for an experienced engineer for the Nitro cards product team. Our products include the most advanced interfaces and technologies and widely used across our data centers as backbone for Nitro and other services. The candidate will serve as expert for Nitro HW power domain - ensuring best design, integration and operational health for power domain for our Nitro cards in our data centers.

As a member of a product team you will own complex system debugs involving HW, FW and SW components. You will deal with functional and integration aspects related to complex systems focusing on the power domain related to Nitro HW. You will be involved in architecture decisions, integrations, deployments and debugging related to complex systems while also providing remote and on-site support to our global colleagues.
You will also provide leadership by driving the teams around you to raise the bar and deliver higher quality product on behalf of our customers. This is a fast-paced, intellectually challenging position, and you will work with thought leaders in multiple areas of technology. You will set high standards for yourself and everyone you work with, and will be constantly looking for ways to improve the performance, quality, cost and reliability of products and services you own. We are changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities:
- Lead triage, debug and root cause analysis of Nitro HW Power domain related issues in our systems (card / system level).
- Enhancing the ability to trouble shot issues and driving for closure of in-fleet problems.
- Analyze customers` mode of work / requirements and provide resolutions accordingly.
- Co-work with Annapurna Labs monitoring team and other root cause teams to improve quality and reliability of products operation in the fleet.
- Provide Annapurna Labs Board, ASIC and system design, SW and testing development, QA and architecture teams information and requirements from customers fleet operation perspectives and represent the customer voice.
- Drive and maintain trainings, quality documentation and collateral in order to improve in-fleet operation.
- Design and define various tools and scripts to provide support to projects and customize it as per requirement.
- Willing to travel per need few times a year.
Requirements:
BASIC QUALIFICATIONS:
- B.Sc. in one of the following: Electrical / Computer Engineering, or a related field.
- 7+ years of experience in designing boards / systems involving power circuitry.
- High level of expertise in power circuitry design and integration.
- Basic skills in scripting: Python / Bash etc.
- Experience in driving cross team and cross disciplinary activities.

PREFERRED QUALIFICATIONS:
- 10+ years Design and Debug / Integration Experience in systems involving HW, FW and SW.
- Advanced programming skills.
- Computer architecture knowledge (design or architecture) for x86 / ARM.
- Experience with operating systems, boot loaders, networking, and remote debugging.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The ML, Systems & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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תודה על שיתוף הפעולה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be part of a team developing Application-Specific Integrated Circuit (ASIC) used to accelerate networking in data centers. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators. You will be responsible for performance analysis for an end to end networking stack using deep knowledge of RDMA based transports.
The ML, Systems & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Participate in evaluation of future ASIC designs and general architecture for executing our companys data center networking roadmap, off-the-shelf components, vendor co-developments, custom designs, and chiplets.
Collaborate in developing new layer protocols for data center networking.
Understand how everything interacts with software and other ASIC subsystems to implement groundbreaking data center networks.
Define performance hardware/software interfaces. Write micro-architecture and design specifications
Define efficient micro-architecture and block partitioning/interfaces and flows.
Requirements:
Minimum qualifications:
Bachelor's degree or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production.
Experience working with design networking such as RDMA or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience developing RTL for ASIC subsystems.
Experience in Cross-functional, micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience working with software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience in a procedural programming language (e.g., C++, Python, Go).
Experience in estimating performance by analysis, modeling, and network simulation. Skilled in defining and driving performance test plans.
Understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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חברה חסויה
Location: Haifa
Job Type: Full Time
We are looking for an experienced Hardware Team Lead to manage our Board Design Engineering team within the AV department. In this critical role, you will drive the development of cutting-edge automotive products by owning the design and delivery of high-performance electronic boards and systems. Your leadership will ensure projects meet the highest standards of quality, performance, and innovation.
What will your job look like?
Lead and Do: Combine strong technical leadership with hands-on hardware engineeringthis role is both strategic and actively involved in execution.
Team Management: Mentor, guide, and grow a high-performing team of hardware engineers, while setting clear technical direction and expectations.
End-to-End Project Ownership: Drive the entire hardware development lifecyclefrom architecture and schematic design to validation and release to mass production.
Design Leadership: Personally contribute and oversee electrical design, schematic reviews, component selection, and layout best practices.
Lab Engagement: Stay closely involved in board bring-up, debugging, and validationworking side by side with engineers to solve tough technical challenges.
Cross-Team Collaboration: Act as a key point of contact across software, mechanical, architecture, and manufacturing teams to ensure seamless product integration.
Customer-Facing Leadership: Represent the hardware team in technical discussions with customers, demonstrating both leadership and in-depth technical knowledge.
Requirements:
Education: Bachelors or Masters degree in Electrical Engineering.
Experience:
8+ years of hands-on experience in hardware board design
3+ years of experience in a managerial or technical leadership
Technical Expertise:
Strong foundation in digital circuits, power systems, and high-speed board design.
Broad system-level understanding, including HW/SW interfacing, validation, verification, DFT, and qualification.
System-level understanding: including hardware-software interfacing, validation, verification, design-for-test (DFT), and qualification.
Problem-Solving: Strong analytical skills with the ability to work independently and perform under pressure.
This position is open to all candidates.
 
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חברה חסויה
Location: Hod Hasharon
Job Type: Full Time
Required Senior HW architect
Hod Hasharon
About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.
Requirements:
BSc/MSc/PhD in Electrical/Computer Engineering or a related field.
10+ years of experience in VLSI/ASIC design/Chip architecture or micro-architecture of complex blocks.
Experienced in high speed networking (such as: Ethernet Switch, NPU, NIC, Traffic Manager, Fabric Switch, etc).
Skills:
Excellent communication skills in English - written and verbal.
Good team player - good team working skills; the ability to work with people at all levels.
Independent and self-learning.
Enthusiastic
Self motivated.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use Application-Specific Integrated Circuit (ASIC) design to be part of a team that creates the System on a Chip (SoC) design cycle from start to finish. You will collaborate with design and verification engineers in projects, creating architecture definitions with Register-Transfer Level (RTL) coding, and running block level simulations. You will contribute in ASIC designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and more to specify and deliver high quality SoC/RTL. You will also solve technical problems with micro-architecture and solutions, and evaluate design options with performance, power, and area.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
3 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog.
Experience with reasoning synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power as well as low-power design techniques.
Experience in reasoning design and debug with Design Verification (DV).
Preferred qualifications:
Experience with a scripting language like Python or Perl.
Experience with design sign off and quality tools (e.g. Clock Domain Crossing (CDC), etc.)
Knowledge of SOC architecture and assertion-based formal verification.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate SDRAM (DDR), Advanced eXtensible Interface (AXI), ARM processors.
Knowledge of high performance and low power design techniques.
This position is open to all candidates.
 
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Location: Hod Hasharon
Job Type: Full Time
Required Servo Drive& Controller Hardware Expert
Job Description:
As a Servo Drive & Controller Hardware Expert, you will focus on the research and design of servo drive & controller hardware for automation.
Duties & Responsibilities
Gain insights into local hardware resources and industry trends of the precision servo drive & controller technologies; initiate and identify R&D opportunities on precision automation hardware and advanced automation architecture; cooperate with existing resources based on business needs in order to efficiently adopt/acquire cutting-edge technologies, and support continuous growth and evolution of automation technologies.
Lead the development on servo drive & controller hardware architecture and solution design, and make breakthroughs in key technologies.
Develop system-level design capabilities for precision automation mechanical systems and platforms; responsible for end-to-end delivery of automation equipment, as well as implementation, tuning, verification, and iteration.
Requirements:
Ph.D. or Masters degree in electrical engineering, computer engineering, mechatronics, etc.
Proficient in digital/analog circuit design, signal integrity and power integrity knowledge, high-speed digital circuit design; familiar with CPU, FPGA, power supply, clock, memory, reliability analysis, etc.
Previous experience in breakthroughs of key technologies, such as high-speed and high-efficiency motion mechanism design, vibration and noise suppression and isolation, simplistic design for cost optimization, etc.
Proficient in the design and development of servo drive & controller hardware for automation; previous experience in leading the cutting-edge servo drive & controller R&D in the industry; previous experience in leading high-speed & high-precision automation architecture and solution design; capable of breaking down component performance indexes and solving problems for industry automation equipment
Proficient in automation hardware selection and sizing, as well as circuit simulation; familiar with hardware design, manufacturing, and tuning process.
This position is open to all candidates.
 
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8186735
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Develop and execute comprehensive validation plans for our company's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation and/or FPGA platforms.
Lead the debugging and resolution of complex silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
8 years of experience in silicon validation or a related field.
Experience in leading technical teams and build cross-functional relationships.
Experience in silicon validation methodologies, tools, and techniques, including hardware setups, and automation tools on Emulation or FPGA platforms.
Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, Hardware Emulation (ZeBu Server, Palladium, Veloce), or simulation platforms.
Knowledge of cloud computing technologies and architectures, including data centers, networking, and storage.
Familiarity with hardware description languages (e.g., Verilog, VHDL) and hardware verification methodologies (e.g., UVM, SystemVerilog).
Excellent communication skills, with the ability to convey technical concepts to audiences.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8187460
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