לוח משרות דרושים הייטק חומרה בהוד השרון, לחיפוש זה נמצאו 12 משרות

We are seeking a highly experienced professional with a strong background in RF, digital, and system-level testing, and with the ability to guide technical decisions, solve complex integration challenges, and support advanced test equipment for production environments.

What will you do:

Design and develop Automated Test Equipment (ATE) for RF, digital, and mixed-signal products at board and system levels.

Lead the technical definition and implementation of test strategies in collaboration with R&D, product engineering, and manufacturing teams.

Own the technical analysis of system schematics, block diagrams, and interface requirements to define robust and reliable ATE solutions.

Support production lines by troubleshooting test failures and optimizing test processes for yield and throughput improvements.

Provide technical guidance for integration with software and firmware control and automation systems.

Evaluate and select test instruments, fixtures, and measurement techniques based on product specifications.

Maintain documentation for test systems, including design files, calibration procedures, and troubleshooting guides.

Mentor engineers and technicians on ATE methodologies, operation, and maintenance.

Required Senior CPU Core Architect
Job Description
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Required Senior HW architect
About the group:
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

We are looking for a Senior AI Modeling Architect to define and model the architecture of our next-generation AI processors. In this role, you will serve as a key technical authority - bringing not only strong modeling capabilities, but also the architectural vision to propose and drive end-to-end solutions to complex design challenges.
You will work at high levels of abstraction, partnering closely with HW and SW architects to co-invent optimal solutions, validate them through simulation, and influence design decisions based on experimental data.
Responsibilities:
Model CPU/AI processor functionality and performance using SystemC and pre-silicon simulation environments
Define and drive architectural solutions - not only identify problems, but come with concrete proposals and alternatives
Partner with lead HW and SW architects to co-design features and evaluate trade-offs across the stack
Analyze bottlenecks and performance on workloads reflecting future AI use cases Provide proof-of-concept implementations for new architectural features and design alternatives
Potentially lead feature definition in addition to the modeling role

Required CPU Core Micro Architect
Job Description
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

Required Modeling
Job Description
Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

Required HW Architect team leader
About the Group
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
our Impact:
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing:
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

Required Senior Firmware Developer
Our team at the Huawei Smart Platforms innovation Lab is chartered to research and incubate new technologies that will redefine the future data centers, cloud and supercomputer performance and functionality.
What will you be doing?
The group is looking to hire a deeply technical and creative developer to design and prototype end-to-end novel solutions in the networking and distributed computing domains for our data center, covering Cloud, Storage Big Data, network programmability, and end-to-end network software stacks.
This position offers the opportunity to have a real impact in a research-focused team in a dynamic company.
If you are a team player with excellent communication skills and motivation to revolutionize the cloud, you are welcome on board!

Be part of the team that is responsible for developing and optimizing the state-of-the-art analog circuits that power our embedded ReRAM and mixed-signal products.
In this role, you will take the lead on designing high-performance analog circuits, driving innovation in mixed-signal systems from concept through production. Youll partner closely with digital design, system architecture, and process engineering teams, playing a key role in bringing our next generation of memory products to market:
Design and develop complex analog circuits, including amplifiers, complex memory arrays, and LDOs, ensuring reliability and performance
Collaborate with cross-functional teams to define system specifications and architecture, translating requirements into actionable designs
Conduct thorough simulations and analyses to validate designs, using tools such as Cadence Virtuoso and Siemens Solido while identifying and mitigating risks early in the design process
Oversee the transition of designs from prototype to production, ensuring compliance with quality and industry standards
Apply deep expertise in analog circuit design - including amplifiers, voltage references, comparators, and ADCs/DACs - to push the boundaries of performance