Required Senior Design Verification Engineer
Background
Things work differently in space. We develop New-Space hardware and software that work flawlessly in harsh space conditions. Our technology is already deployed in space and used in many satellites and more than 50 space missions across the solar system with zero failures.
We are expanding our Design Verification team, and invite you to explore Space with us! The job includes taking a viable role in the VLSI verification tasks of our line of products.
What you will be doing:
Be part of the verification Team
Plan & implement UVM verification environments
Interact with Architecture, Design, SW and Validation teams
Define new DV methodologies and improve existing ones
Work on both ASIC and FPGA Space system projects.
Requirements: 10+ years of experience in Design Verification
System Verilog UVM proficiency
Solid experience in formal verification / emulation / PCIE verification / FPGA Advantage
Scripting knowledge and passion Advantage.
This position is open to all candidates.
