דרושים » הנדסה » Electrical Validation & Embedded SW Engineer

Our EyeQ Platform Group is looking for a talented Embedded SW Developer to join our Haifa team. In this role, you will be at the heart of our SoC (System on a Chip) validation, specifically responsible for theVideo Interface Unit- the "eyes" of our autonomous driving technology.
You will write high-performance, object-oriented C++ code on our proprietary validation OS, interface with low-level drivers, and take a lead role in complex board bring-up processes. If you thrive on solving "impossible" hardware-software puzzles alongside HW engineers, this is the place for you.
What will your job look like:
Design and implement robust C++ code for multi-threaded, multi-core environments running on advanced MIPS and RISC-V architectures.
Develop Video Interface drivers and frameworks, maintaining and scaling existing systems to support next-gen SoC capabilities.
Board bring-up activities and debug complex systems on our proprietary Silicon.
Utilize on-SoC scripting engines to provide flexibility and interactive SoC usage for internal and external stakeholders.

Required Senior IC Test Engineer
About the team:
The Production Test team - responsible for the definition, development, and deployment of production test operations for the worlds most advanced SoCs for ADAS and self-driving vehicles.
This is your opportunity to join a team during its initial forming stage and leave your mark as we assume full ownership for our silicon production operations to enable high volume manufacturing for cutting-edge automotive products.
What will your job look like?
Work closely with the design teams from early stages of the design process to review DFX architecture and define test requirements.
Define test methodologies and generate test content for high-speed interfaces of embedded IP blocks (LPDDR4/5, PCIe Gen4/5, D/C/MPHY).
Test program coding, pattern conversion and pre-Si validation (virtual test simulations)
Support Load Board and Probe Card design activities.
Lead post-Si test program debug activities to enable delivery of samples to internal and external customers.
Test program characterization and tuning to enhance test program quality to meet automotive standards.
Support Quality & Reliability team to enable effective and timely qual plan execution.
Lead test deployment activities with tier-one Foundry and OSAT vendors to enable large-scale Wafer-Sort and Final-Test operations.

Required Power and Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives.
You'll set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Design and optimize power distribution networks (PDN) across chip, package, and board levels. This includes managing power/ground planes, decoupling capacitors, and power gating strategies.
Conduct both pre-layout and post-layout power integrity simulations to analyze power and ground noise (SSN/SSO), voltage drops (IR drop), and electromagnetic interference (EMI).
Implement and verify low-power design methodologies, such as multi-voltage designs and clock gating, using power intent formats like UPF/CPF.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.

This role is for a analog IP lead who will enable us to produce fully functional first silicon IP designs. The responsibilities include all phases of silicon development from definition to high quality production.


Specifying requirements and circuit architecture for analog blocks and sub-blocks of an IP, lab bring-up, characterization and debug, write specifications, test plans and characterization reports, work with chip design teams, system HW and SW design teams, ATE PE.

You will be responsible for:
Develop the circuit design of the IPs analog blocks following established design guidelines based on microarchitecture spec. Own all aspects of circuit design development.
Work and collaborate with other designers in the group to deliver results.
Work with FE & BE teams to ensure quality analog integration.
Work with power/performance and functional verification team to define and validate operation sequences.
Work with multi-disciplinary teams to make sure designs are delivered on time and with highest quality by incorporating proper checks at every stage of the design process.
Work with post silicon validation groups to ensure the design meets the power/performance targets.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

We're seeking a passionate and skilled Embedded Firmware Engineer to play a pivotal role in delivering the next generation of us. In this highly visible position, you'll be at the intersection of hardware and software, collaborating closely with logic designers to deeply understand system-level operations and performance requirements for hardware validation. In this role, you will develop critical low-level embedded firmware specifically designed to validate hardware functionality, ensure conformance, and drive performance during the bring-up and testing phases of new silicon. This involves designing, developing, and integrating complex drivers, diagnostic tests, and infrastructure essential for SoC bring-up, post-silicon validation, and debugging activities. Ultimately, you'll lead hands-on firmware development, system-level validation, and problem-solving at the hardware-software interface in a dynamic, collaborative environment, with your work directly enabling the successful launch of future products by ensuring our silicon meets the highest standards.

Required Staff Signal Integrity Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead end-to-end signal integrity definition, channel budgeting, and stackup optimization for complex multi-die packages, including 2.5D (CoWoS, EMIB, InFO), 3D vertical stacking, and high-density organic substrates.
Architect and optimize multi-terabit interconnects across Die-to-Die (UCIe/BoW), host links (PCIe Gen6/7, PAM4/# SerDes), and memory subsystems (HBM3/4, DDR5, LPDDR6) in close collaboration with PHY and silicon design teams.
Build high-accuracy 3D full-wave electromagnetic models (HFSS) for micro-bumps, C4 bumps, TSVs, interposers, and BGA transitions, establishing automated flows for statistical eye/BER margin analysis.
Define high-frequency test vehicles, fixtures, and measurement methodologies; execute multi-port VNA, TDR, and real-time scope characterizations to correlate lab measurements with predictive simulations.
Collaborate closely with Silicon Design, Package Layout, Board/System, and external foundry/OSAT partners to resolve design trade-offs

We're seeking a passionate and skilled Embedded Firmware Engineer to play a pivotal role in delivering the next generation of us. In this highly visible position, you'll be at the intersection of hardware and software, collaborating closely with logic designers to deeply understand system-level operations and performance requirements for hardware validation.

In this role, you will develop critical low-level embedded firmware specifically designed to validate hardware functionality, ensure conformance, and drive performance during the bring-up and testing phases of new silicon. This involves designing, developing, and integrating complex drivers, diagnostic tests, and infrastructure essential for SoC bring-up, post-silicon validation, and debugging activities. Ultimately, you'll lead hands-on firmware development, system-level validation, and problem-solving at the hardware-software interface in a dynamic, collaborative environment, with your work directly enabling the successful launch of future our products by ensuring our silicon meets the highest standards.

Required Integration and Validation Architect
About the team:
Join our hardware systems team to drive DV/PV software readiness for our AV-HW Tier 1 products. Youll combine customer-facing technical leadership, detailed validation design and hands-on integration to secure internal acceptance and customer satisfaction with testability and coverage.
What will your job look like:
Youll lead customer technical reviews, present readiness and validation evidence, and resolve concerns about testability and coverage.
Youll translate customer expectations and system requirements into detailed integration plans, coverage, loads, diagnostics and monitoring requirements.
Youll define interfaces between DV/PV software, SoCs, test hosts, equipment and automation, guiding teams and suppliers through implementation and verification.
Youll bring up test setups, integrate hardware and software releases, and troubleshoot issues using measurements, logs and controlled experiments.
Youll use technical judgment to coordinate investigations and corrective actions across teams, and verify that issues are resolved.
Youll own technical documentation and customer review material, keeping coverage tables, procedures and reports aligned with demonstrated capabilities.
Youll accept or withhold technical readiness against agreed requirements and assess the validation impact of hardware and software changes.

Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.