דרושים » ייצור ותעשייה » Senior Manufacturing & NPI Engineer (Prototype to Low-Volume)

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לפני 4 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
We're looking for a hands-on systems engineer to lead prototyping and low-volume assembly (tens to hundreds of units) - taking hardware from first builds to a repeatable process, designed with scale-up and BOM cost in mind.

Responsibilities
Lead prototype and pilot builds; turn lessons into a repeatable assembly process.
Plan assembly flows, fixtures/jigs, and the right (minimal) automation - engineering simplicity first.
Own the project plan (Gantt) and budget; design for scale-up with BOM cost awareness and DFM feedback to R&D.
Define test and inspection strategy, including environmental testing where needed.
Measure and improve yield and rework with data; work daily with R&D, production, and vendors on the floor.
Requirements:
B.Sc. in Electrical Engineering or related field.
7+ years of proven hands-on experience in manufacturing/NPI of electro-mechanical products.
Experience taking hardware from prototype to production, even at low volumes.
Automation and tooling know-how (fixtures, PLCs, sensors) - and the judgment of when not to automate.
Applied statistics and SW tools: Gantt/project planning, advanced Excel, data analysis (Minitab/JMP/Python or similar).
Practical experience with AI tools (ChatGPT, Claude) for work automation - building workflows, agents/skills, and using them to accelerate engineering tasks.
Budget ownership and vendor procurement experience.
Excellent interpersonal skills.
Excellent English, written and spoken.
Problem-solver with a can-do attitude - takes ownership and gets things built.
This position is open to all candidates.
 
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17/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a highly driven, hands-on Production Engineering Leader to join our Operations & Manufacturing team. In this role, you will serve as the primary operational link to our Contract Manufacturers (CMs), drive the end-to-end NPI handoff process into steady-state production, manage legacy product lines, and streamline the production-side RMA pipeline.

If you thrive in a high-growth, fast-paced hardware environment, love diagnosing complex manufacturing challenges, and are passionate about continuous improvement, this is the role for you.

Key Responsibilities

Contract Manufacturer (CM) Management & Line Ownership

CM Operations & Execution: Drive day-to-day operational and technical alignment with external CMs to ensure high build execution, product yield, and strict adherence to quality and schedule targets.
Manufacturing Bottlenecks: Identify and resolve yield drops, component shortages/substitutions, or assembly issues directly with vendor engineering teams.
ECO/ECN Release: Oversee engineering change implementation across active production runs at the CM, maintaining clear configuration control.
NPI Composition Handoff & Legacy Product Support

NPI to Production Handoff: Lead the operational composition and transfer of new product introductions (NPI) from R&D into scalable volume manufacturing at the CM level.
Legacy Product Management: Maintain operational health, sustaining engineering, and end-of-life (EOL) management for legacy product lines to ensure ongoing delivery stability.
Process Documentation: Define standard operating procedures (SOPs), assembly routing, build packages, and work instructions for incoming product variants.
Production RMA Process

RMA Pipeline Management: Take ownership of the production side of the Return Merchandise Authorization (RMA) process, ensuring rapid triage, dispositioning, and turnaround times.
Feedback Loop: Feed critical quality, design, and manufacturing insights back to R&D and Quality teams to drive design-for-manufacturability (DFM) improvements.
Continuous Improvement

Yield & Efficiency Optimization: Track key operational metrics (First Pass Yield, Scrap, Cycle Time) and implement engineering fixes to minimize waste and reduce lead times.
Tooling & Fixturing: Coordinate with suppliers to design, validate, or upgrade assembly fixtures, jigs, and test setups.
Requirements:
Education: B.Sc. in Industrial Engineering,g Mechanical Engineering, Electrical Engineering, or a related technical discipline.
Experience: 3-5+ years of experience as a Production, Manufacturing, or NPI Engineer in a fast-paced, multi-disciplinary hardware environment.
Domain Expertise: Proven background working with high-precision electronics, RF systems, or advanced scientific control equipment.
CM Oversight: Hands-on experience managing external Contract Manufacturers (assembly lines, technical alignment, yield tracking, and performance reviews).
NPI & Legacy Management: Demonstrated ability to manage NPI handoff composition into volume production, as well as sustaining/legacy product management.
RMA Management: Proven track record running and dispositioning production-side RMA workflows.
Systems & Processes: Strong working knowledge of PLM/ERP/MES systems (e.g., Agile, Jira, Priority, NetSuite, SAP).
Communication: Excellent verbal and written English skills for effective cross-functional collaboration with R&D, Supply Chain, and external vendor leadership.
This position is open to all candidates.
 
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Principal DFT Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, ensuring the reliability and testability of chips that power the world's largest AI clusters.

As a Principal DFT Engineer, you will provide technical leadership across the full DFT lifecycle-from architecture and specification through implementation, verification, and silicon bring-up. You will define and drive DFT strategy, establish robust methodologies, and lead execution to ensure high test quality and manufacturability. This role requires deep expertise, cross-functional influence, and the ability to drive DFT excellence across projects and teams.
This is a critical leadership position with high impact on first-pass silicon success and production quality for next-generation AI connectivity solutions.
Key Responsibilities

DFT Architecture & Technical Leadership
Define and own DFT architecture for complex SoCs, including Scan, MBIST, LBIST, JTAG/iJTAG, and ATPG strategies.
Lead DFT planning, specification, and quality tracking across the project lifecycle.
Provide technical leadership and drive DFT sign-off readiness to ensure successful tapeout.

Execution Across the Full Lifecycle
Lead DFT implementation, integration, and verification at block, full-chip and chiplet levels.
Own end-to-end DFT activities from specification through silicon bring-up and production support.
Ensure high test coverage, robust pattern generation, and alignment with manufacturing requirements.

Methodology & Cross-Functional Impact
Develop and drive scalable DFT methodologies, flows, and automation frameworks.
Collaborate closely with RTL, Physical Design, STA, and Test Engineering teams to ensure design-for-test readiness.
Optimize DFT integration across front-end and backend flows to improve quality, PPA, and turnaround time.
Requirements:
Basic Qualifications
Bachelors degree in Electrical Engineering or related technical field (Masters preferred).
12+ years of experience in DFT design, implementation, and verification for complex ASIC/SoC designs.
Proven experience in leading DFT activities across full chip development cycles.
Deep expertise in DFT techniques including Scan, MBIST, LBIST, JTAG/iJTAG, and ATPG.
Strong understanding of DFT and Physical Design flows, including timing implications and integration challenges.
Experience with industry-standard DFT tools (Siemens Tessent, Synopsys TestMAX or equivalent).
Solid experience with DFT verification methodologies and coverage analysis.
Strong scripting skills (Tcl, Python, or Perl) for automation and flow development.

Preferred Qualifications
Experience with advanced process nodes (7nm and below).
Background in high-speed connectivity designs (PCIe, Ethernet, CXL, or similar).
Experience with hierarchical DFT methodologies and large multi-die or chiplet-based systems.
Knowledge of silicon bring-up, production test flows, and yield optimization.
Familiarity with STA, low-power design, and CDC as it relates to DFT integration.
Strong leadership and communication skills, with ability to influence cross-functional teams globally.
This position is open to all candidates.
 
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7 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
The Networking Application Engineering team is looking for a motivated, experienced Senior Hardware Engineer who thrives at the intersection of hardware performance, ecosystem validation, and ODM/OEM partnerships. In this high-impact role, you will own critical qualification tooling, drive the design-in process with leading hardware partners, and collaborate across םור R&D organization to accelerate hardware resolutions at scale. Your work will directly influence the quality and velocity of next-generation networking hardware reaching the world's most advanced data centers and supercomputers.

What You'll Be Doing:

Own and lead the Hardware Performance and Qualification tooling suite, driving continuous improvement in test coverage, automation, and accuracy in collaboration with leading ODMs and OEMs.

Drive the design-in process with top-tier ODM and OEM partners, ensuring seamless hardware integration and delivering best-in-class platform experiences.

Partner cross-functionally with multiple R&D departments to identify, escalate, and resolve hardware issues rapidly - reducing time-to-resolution and maintaining platform quality.

Define and execute qualification plans for new hardware platforms, validating performance, stability, and compliance across diverse system configurations.

Build and nurture trusted technical relationships with ODM/OEM engineering teams, acting as the go-to expert for hardware performance and qualification.

Provide actionable feedback to engineering and product teams based on qualification findings and partner interactions.
Requirements:
What We Need to See:

BSc/MSc in Electrical Engineering, Computer Engineering, or a related field or equivalent experience.

5+ years of experience in hardware development, including high-speed multilayer PCBs.

Proven problem-solving skills with a track record of driving issues to closure.

High proficiency in English communication and presentation.

Excellent interpersonal skills - comfortable engaging directly with ODM/OEM technical counterparts.


Ways to Stand Out from the Crowd:

Knowledge of server topology, PCIe protocols, BMC interfaces, and security aspects.

Experience with the physical layer of network and PCIe ports, including SerDes tuning.

Proven track record working directly with ODMs and OEMs through design-in and qualification cycles.

Knowledge of high-speed signal integrity theory and practice, with experience using lab equipment.

Experience in script or firmware development to enhance test automation.
This position is open to all candidates.
 
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לפני 3 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC Product Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Develop and implement strategies for high volume manufacturing of SoC products, including troubleshooting, ATE test coverage optimization, DPPM reduction, test cost reduction, power and performance assurance, and product data integration and correlation between system, ATE, and SLT.
Drive interactions with wafer fab and OSATs, own and drive checkpoints for key quality metrics.
Drive volume ramp and mass production through test program releases, volume data analytics, lot disposition, extended test time reduction, yield improvement, and RMA handling.
Support setup and maintenance of test, diagnosis, and yield analysis infrastructure, including Return Merchandise Authorization (RMA) support.
Collaborate with cross functional teams across the globe including ATE and SLT Test Engineering, Quality and Reliability (Q&R), Packaging, Supplier Management and Operations to build, deploy, and maintain a high volume manufacturing screening solution.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience in product engineering or test engineering.
Experience developing on Advantest 93K or Teradyne UltraFlex ATE platforms.
Experience with product engineering, supply chain data analytics, or diagnostics for High Volume Manufacturing (HVM) or NPI.
Preferred qualifications:
Experience with industry standards, design tools, and DFT best practices, including at-speed TDF, ATPG, MBIST, memory repair, diagnostic tools, and yield improvement.
Experience evaluating customer returns with ATE and SLT, identifying coverage gaps, developing incremental structural and functional patterns to address quality issues.
Experience delivering HVM screening solutions for high performance computing chips in advanced technology nodes with low Defective Parts Per Million (DPPM).
Knowledge of statistical analysis (e.g. JMP), Yield Management Systems (e.g. Exensio, YieldExplorer, JMP), or Python for data analytics.
This position is open to all candidates.
 
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לפני 1 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.
Requirements:
Minimum qualifications:
Bachelor's degree in Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, automatic test equipment (ATE) program development, and post-silicon enabling from new product introduction (NPI) through high-volume manufacturing.
Experience with ASIC test methodologies (MBIST, ATPG, DFT, SerDes, and sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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24/08/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Hardware Team Lead to own our electrical hardware from the first rough prototype all the way to a product that holds up in the field. You will lead a team of hardware engineers who work across most of what we build: board design and hands-on investigation, ultra-sensitive sensors, power circuits for our transmitters, RF and noise-sensitive systems, high-speed digital and communication, ADCs, DACs, and more.
We move fast, and that is a big part of the fun here. Quick prototypes and rough bring-ups are how we learn. Your job is to keep that speed, but make sure that when something proves itself it stops being a prototype and becomes real engineered hardware: reviewed, testable, documented, and built to be manufactured. You set the engineering bar, make the calls on design, and own the work we send to external design houses and suppliers, so that outsourced never means unowned.
Requirements:
Bachelor's degree in Electrical Engineering.
7-10 years of hardware / electronics engineering experience (analog and digital board design, layout, bring-up, and debug), including 2-3 years managing hardware or multidisciplinary engineering teams.
You have taken hardware all the way to manufacturing, not just to a working prototype.
Hands-on proficiency with the team's board design tools (Altium).
Experience directing and managing external design houses or hardware suppliers.
A systems mindset, and comfort working across embedded, mechanical, and sensing.
Strong communication and leadership. You can push for speed without letting quality slide.
Hebrew and English.
Nice to have:
Experience scaling hardware from low-volume prototypes to volume manufacturing.
Background in sensing, RF/EM, or other signal-intensive systems.
Experience in a fast-paced startup or high-growth environment.
This position is open to all candidates.
 
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02/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and English Speakers
We are looking for a NPI Configuration Engineer to join our team. The NPI Configuration Engineer will be responsible for leading new product introduction projects and ensuring a successful transition from development to manufacturing.
Your Day to Day:
Own all engineering documentation: drawings, BOMs, work instructions, PNs
Manage engineering change processes (ECOs, MCOs, product revisions) end-to-end
Maintain data integrity in PDM/PLM and ERP systems (Priority, SolidPDM- advantage)
Drive new product introduction (NPI) from design to small-scale and mass production (including DFM/DFA/DFT, vendor support, and configuration control)
Participate in design reviews and support risk mitigation during development
Identify opportunities and lead cost reduction initiatives
Requirements:
NPI and configuration control in optics, lasers, electronics, and mechanics, with at least 4 years of experience
Hands-on experience in production transfer and working with CMs
Strong project ownership, communication, and problem-solving skills
Technical background across mechanics, optics, and embedded systems
Bachelor's degree in engineering- advantage
Experience working in a startup environment- advantage
Fluent in English, both verbal and written
This position is open to all candidates.
 
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24/09/2026
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Expert IC Package Design Lead to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.

As an Expert IC Package Design Lead, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon.
You will own package flow, architecture, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for defining package technologies that meet aggressive electrical, thermal, mechanical, and cost targets, enabling our products to operate reliably in the worlds most demanding AI and cloud environments.

Key Responsibilities
Own end-to-end IC package design, from early architecture and feasibility through detailed design, qualification, and high-volume manufacturing.
Define package architecture and technology selection (organic substrates, advanced laminate, interposers, multi-die/chiplet packaging, CoWoS - 2.5D/3D integration).
Lead signal integrity (SI), power integrity (PI), and thermal considerations at the package level for high-speed, high-power devices.
Drive package layout, substrate routing, bump/ball maps, stack-ups, materials selection, and mechanical constraints.
Collaborate closely with silicon design, SerDes, system, SI/PI, and reliability teams to optimize overall product performance.
Interface with OSATs, substrate vendors, and manufacturing partners to ensure design-for-manufacturability (DFM), yield, and cost targets.
Lead package-related risk assessment, failure analysis, and corrective actions during bring-up and production ramp.
Support NPI, qualification, and product sustainment activities, including vendor audits and technical reviews.
Requirements:
Basic Qualifications
10+ years of hands-on IC BIG package design experience for high-performance semiconductor products, with full ownership from concept through tape-out.
Expert proficiency in IC package design tools (Cadence APD / SiP or equivalent) and experience designing complex packages (BGA, FCBGA, FCCSP).
Strong package architecture & integration expertise, including stack-ups, ball/bump maps, constraints, SMT integration, and package BOM ownership.
Deep understanding of signal, power, and thermal integrity at the package level, with ability to drive design tradeoffs based on analysis.
Proven manufacturing and release experience, including DRC/LVS/DFM, OSAT engagement, and delivering production-ready package designs.

Preferred Qualifications
Experience with AI, networking, PCIe, CXL, or other high-speed data center interfaces.
Familiarity with package reliability standards and qualification (JEDEC, IPC, thermal cycling, HTOL, etc.).
Experience supporting chiplet-based architectures and heterogeneous integration.
Prior technical leadership or package ownership on high-volume products.
This position is open to all candidates.
 
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24/09/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a highly skilled Front-End CAD Engineer to join our local engineering powerhouse from the ground up.

As a Front-End CAD Engineer, you will be the backbone of our chip design ecosystem. You wont just be using tools; youll be architecting the methodologies, automation scripts, and design flows that enable our hardware teams to push the limits of silicon performance. Your work directly impacts the productivity of the design team and the time-to-market for our next-generation processors.


Key Responsibilities
Develop, maintain, and optimize RTL generation tools, building automated IPs and SoC schemes.
Create robust applications using Python and Tcl to automate models build, regression and analysis tools and other assisting tools for all disciplines in front-end flows.
Evaluate and integrate Electronic Design Automation (EDA) tools from vendors like Cadence, Synopsys, and Mentor Graphics.
Define the methodologies of usage and integrate AI tools in this fast-growing field impacting all VLSI development flows.
Requirements:
Basic Qualifications
Bachelors degree in Electrical Engineering or a related technical field.
5+ years of hands-on professional experience in relevant industries.
Proven experience in Python and Tcl within a Linux/Unix environment.
Knowledge and experience in Verilog and/or System Verilog.
Very good communication skills.

Preferred Experience
Strong understanding of the VLSI design cycle, familiarity with clock domain crossing, simulation, debugging, synthesis and timing analysis.
Hands-on experience with industry-standard tools for lint, synthesis, simulation.
Experience with version control systems (Git) and compute cluster management (LSF/SGE).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8832018
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לפני 3 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Test Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Product sustain support, including volume data analysis, test time and yield improvements, assess test escapees and Return Merchandise Authorization (RMAs), localize failures, implement containment measures and partner with design, manufacturing, quality and reliability teams to root cause and implement corrective actions.
Develop tools, flows and methodologies to continuously improve and automate the testing life cycle.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
4 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, ATE program development, and post-silicon enabling from New Product Introduction (NPI) through High Volume Manufacturing (HVM).
Experience in Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Experience with ASIC test methodologies (e.g., mbist, atpg, dft serdes, sensors).
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Ability to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8843305
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שירות זה פתוח ללקוחות VIP בלבד