דרושים » חשמל ואלקטרוניקה » Senior Guidance Engineer

We are seeking a motivated Senior System Validation Engineer to join our growing post-silicon validation team in Israel and support next-generation connectivity products for AI and data-center applications.
In this role, you will perform system-level post-silicon validation, characterization, and debug across silicon, hardware, firmware, and software. You will support silicon bring-up and PVT/corner testing, develop and execute functional and system validation tests, analyze results, and work with cross-functional teams to identify and resolve complex system issues.
This is a highly hands-on lab position. The primary location is Haifa, with temporary support at the Ramat Gan lab as needed.
Key Responsibilities:
Develop and execute post-silicon functional and system validation from silicon bring-up through production readiness.
Run PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.
Develop validation tests to verify functionality, performance, stability, power, and operating margins.
Debug issues across silicon, hardware, firmware, drivers, and system software.
Validate high-speed interfaces such as PCIe, CXL, Ethernet/SerDes, and DDR, as well as common system interfaces.
Develop Python scripts and automation to improve validation coverage, regression, and test efficiency.
Analyze validation data, identify issues and trends, and drive problems to root cause and closure.
Work closely with hardware, architecture, firmware, software, design, and DV teams to investigate and resolve issues.
Support the transition of new silicon from initial bring-up to a qualified, production-ready product.
Operate system platforms and laboratory equipment to support validation and debug.
Document test results, issues, root cause, and recommendations and communicate findings clearly.

We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs.
In this role, you will execute package layout tasks from floor planning through tape out and manufacturing release, working closely with senior engineers, SI/PI, thermal, and manufacturing teams to deliver production-ready designs that meet performance, density, and reliability targets.

Key job responsibilities
- Execute package layout tasks across the design cycle: die floor planning, bump/pad assignment, RDL routing, substrate design, verification, and tape out release.
- Implement physical designs for advanced packaging architectures including 2.5D interposer, 3D-IC, fan-out wafer-level packaging, and silicon bridge technologies (e.g., CoWoS, EMIB, or similar).
- Support package floorplan development considering die placement, bump maps, power/ground distribution, signal escape routing, and decoupling capacitor placement.
- Perform RDL and substrate routing for high-density interconnects including microbumps, C4 bumps, TSVs, microvias, and PTH vias across multi-layer organic substrates or silicon interposers.
- Support die-level RDL routing and bump planning in coordination with ASIC physical design teams to help co-optimize the die-package interface.
- Contribute to cross-level layout co-optimization across die RDL, interposer/substrate, and PCB levels under guidance from senior engineers.
- Assist in maintaining package stack-up definitions in collaboration with SI/PI and materials engineering teams.
- Run physical verification checks (DRC, connectivity, shorts/opens) and support design closure.
- Follow and help refine package design rules and guidelines, working with OSAT partners and foundries to ensure DFM compliance.
- Collaborate with SI/PI engineers to incorporate electrical constraints into the physical layout - impedance-controlled routing, power plane optimization, and critical net shielding.

As we expand our presence in Israel, we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging.
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies.
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market.

System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs.
Ensure rapid cycles from RTL to functional stability through systematic debug approaches.
Own technical blocks and drive them to completion independently.

Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios.
Ensure seamless hardware-software integration for AI infrastructure connectivity.
Collaborate with Design and Verification teams to optimize emulation strategies.

We are looking for a Systems Engineer to take ownership of complex multidisciplinary systems from early definition through integration, validation, and field deployment.
In this role, you will bridge hardware, software, algorithms, sensing, and mechanical engineering, ensuring that every part of the system works together to deliver reliable performance in real-world environments. This is a hands-on position that combines technical depth with a broad system perspective, where you will work closely with a small, experienced team to solve challenging engineering problems and drive innovative

Prisma-Photonics is a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a “sensor free” approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art machine learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
We are looking for a talented, self-driven, and hands-on Electro Optics Systems Engineer to join Prisma Photonics’ R&D team. In this role, you will develop and advance next-generation distributed fiber-optic acoustic sensing (DAS) systems, combining electro-optic system design, performance modeling, simulations, experimental validation, and field data analysis. You will tackle complex physical and engineering challenges, contribute to next-generation product development, and collaborate closely with multidisciplinary teams to bring innovative sensing technologies from concept to real-world deployment. This role is ideal for someone who thrives in a fast-paced, hands-on R&D environment, enjoys working across disciplines, and wants to see their work translate into real-world impact.

Hiring Manager:
Eyal Hollander

What You’ll Do:

* Lead experimental and theoretical R&D efforts for the development of Prisma’s next-generation distributed fiber-optic acoustic sensing systems.
* Design, evaluate, and optimize electro-optic interrogation systems for distributed acoustic sensing applications.
* Develop system-level models and simulations for optical signal generation, fiber propagation, coherent detection, system noise, SNR, and sensing performance.
* Build software tools and simulations in Python, C++, or similar languages for system evaluation, signal processing, field data analysis, and performance modeling.
* Plan, execute, and analyze laboratory and field experiments to validate system performance and support product development.
* Gain unique end-to-end expertise across the full sensing system pipeline, spanning fiber optics, electro-optics, coherent detection, DSP algorithms, and advanced data analysis.
* Lead product development activities from ideation and proof of concept through design, qualification, validation, and deployment.
* Collaborate closely with multidisciplinary R&D teams, including physicists, software engineers, algorithm developers, and hardware engineers.
* Communicate effectively with both technical and non-technical stakeholders, translating complex system behavior into clear insights and actionable recommendations.


What You Bring:

* BSc or MSc in Physics, Optical Engineering, Electrical Engineering, system engineering or a related field.
* At least 4 years of experience in multidisciplinary electro-optic systems, either as a Systems Engineer or in hands-on electro-optic, fiber-optic system design, integration, testing, or performance evaluation.
* Experience with noise analysis, including phase noise, detector noise, amplifier noise, SNR, and related system performance metrics.
* Experience with advanced optical measurement techniques, laboratory setups, and system characterization.
* Strong programming skills in Python, C++, or similar languages.
* Excellent analytical and problem-solving skills, with the ability to connect physical phenomena, system behavior, and data-driven insights.
* Strong communication skills and the ability to work effectively both independently and as part of a multidisciplinary team.
* Ability to manage multiple projects and priorities in a dynamic, fast-paced environment.


Great to Have:

* Knowledge in digital signal processing.
* Experience with telecom optical systems or

The Networking Diagnostics team is seeking a highly motivated and experienced engineer. This person must have hands-on technical expertise to develop critical diagnostic tools for our newest, world-leading networking platforms. This position offers the opportunity to have a real impact in a dynamic, technology-focused company, impacting data centers and high-performance computing (HPC) clusters across the world. We are looking for independent engineers who excel in a fast-paced environment and are passionate about ensuring the stability of next-generation hardware.

What you'll be doing:
Design & Implement: Architect and develop high-performance diagnostic tools and frameworks using Python, tailored for our latest networking platforms.
Performance Optimization: Drive end-to-end development focusing on software that performs efficiently, ensuring diagnostic suites can handle high-throughput data and real-time monitoring without latency.
System Diagnostics: Take charge of developing features that bridge the gap between complex hardware behaviors and software-level diagnostics.
Collaborative Problem Solving: Partner with hardware, firmware, and driver teams to address real-world challenges that demand innovative solutions and a customer-centric approach.
Autonomous Execution: Own the full software development lifecycle of diagnostic features, from initial hardware specification to deployment in dynamic environments.

The Networking Application Engineering team is looking for a motivated, experienced Senior Hardware Engineer who thrives at the intersection of hardware performance, ecosystem validation, and ODM/OEM partnerships. In this high-impact role, you will own critical qualification tooling, drive the design-in process with leading hardware partners, and collaborate across םור R&D organization to accelerate hardware resolutions at scale. Your work will directly influence the quality and velocity of next-generation networking hardware reaching the world's most advanced data centers and supercomputers.

What You'll Be Doing:

Own and lead the Hardware Performance and Qualification tooling suite, driving continuous improvement in test coverage, automation, and accuracy in collaboration with leading ODMs and OEMs.

Drive the design-in process with top-tier ODM and OEM partners, ensuring seamless hardware integration and delivering best-in-class platform experiences.

Partner cross-functionally with multiple R&D departments to identify, escalate, and resolve hardware issues rapidly - reducing time-to-resolution and maintaining platform quality.

Define and execute qualification plans for new hardware platforms, validating performance, stability, and compliance across diverse system configurations.

Build and nurture trusted technical relationships with ODM/OEM engineering teams, acting as the go-to expert for hardware performance and qualification.

Provide actionable feedback to engineering and product teams based on qualification findings and partner interactions.

As we expand our presence in Israel, we're seeking a talented Principal Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Principal Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market

System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently

Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.

This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.

Responsibilities

Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

We are We are seeking a Senior Switch Silicon Security Architect to define end-to-end security across switch silicon, firmware, networking protocols, and management stacks. Working with architecture, engineering, and product teams, this role will shape security from early design through validation, manufacturing, and deployment.

What you'll be doing:

Research, design, and drive the implementation of hardware and software security architectures for switch platforms that meet internal requirements, customer needs, and industry standards.

Develop threat models and define end-to-end security architectures for hyperscale networking solutions spanning silicon, firmware, high-performance networking protocols, and management stacks.

Partner across us with hardware, software, research, and product teams to shape the strategic direction of switch silicon and fabric-level security.

Define and drive multi-generation security roadmaps for switch silicon, networking protocols, and fabric-level solutions.

Engage directly with customers to understand their security requirements and translate them into switch silicon and system architectures that address both component and solution-level needs.

Represent us in industry standards bodies and collaborate with external partners to shape emerging security standards and drive interoperability across silicon and networking ecosystems.