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לפני 22 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Full-Chip verification & Integration Engineer to join our FullChip Switch Silicon team. As part of NVIDIAs Networking business unit, you will work alongside passionate and highly skilled engineers building the next generation of state-of-the-art switch silicon chips. This is a unique opportunity to grow in a technically rich environment and gain broad system-level exposure, and contribute to cutting-edge devices that deliver world-class bandwidth, throughput, and latency.

In this role, you will help integrate and validate complex full-chip flows at the system level, working across multiple engineering domains and learning how advanced silicon products come together from architecture to execution.

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within the organizations such as Architecture, u-arch, Firmware and all switch units and Ips.

Play a key role in validating the most complex end-to-end chip flows, gaining hands-on experience with system behavior, cross-block interactions, and real product-level scenarios.

Use modern AI-powered engineering tools and automation techniques as part of your day-to-day development and debug workflow.

Learn from experienced engineers in a collaborative environment that encourages technical growth, ownership, and continuous improvement.
Requirements:
What we need to see:

Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience

1+ years of experience in verification, advantage for FullChip/SoC

Knowledge in network protocols - advantage

Background in Specman - advantage

A team player with good communication and interpersonal skills

Strong analytical and debugging skills, with eagerness to learn in a fast-paced engineering environment.


Ways to stand out from the crowd:

Exposure to SoC or Full-Chip verification flows.

Familiarity with scripting or automation using Python, Perl, or similar tools.

Understanding of pre-silicon validation, emulation, or post-silicon concepts.

Interest in high-performance networking, switching architectures, or large scale system design.
This position is open to all candidates.
 
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לפני 21 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior verification engineer to join our FullChip Switch Silicon team. As a FullChip verification engineer in our Networking business unit, you'll join a group of passionate and talented engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the switch.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

5+ years of experience in verification, advantage for FullChip/SoC.

Knowledge in network protocols - advantage.

Deep knowledge in Specman - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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לפני 20 שעות
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

Proficiency using Python, Tcl, Shell, Make scripting.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

Self-motivation, attention to detail, and good interpersonal skills.


Ways to stand out from the crowd:

Experience with data collection and analysis

Experience in methodology definition / flow owner of Full-chip / Place and Route

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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לפני 21 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior verification technical lead for our FC Switch Silicon team. As a FullChip verification technical lead Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a FC verification team within the Switch silicon.

Dynamic verification environments planning for units infrastructures and system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

8+ years of experience in dynamic verification.

Knowledge in network protocols and/or HPC and distributed calculations - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
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1 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer at our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of rtl verification environments planning for units and modules.

Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

5+ years of experience in RTL design.

Knowledge in network protocols and/or HPC and distributed calculations - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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1 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a design/verification team which develops core units within the Switch silicon.

Micro-architecture of dynamic verification environments planning for units and modules.

Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

5+ years of experience in RTL design/dynamic verification.

Knowledge in network protocols and/or HPC and distributed calculations - advantage.

A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 21 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
Our Networking System Validation Group is growing, and we are hiring a Senior Switch System Validation Engineer. As a member of the team, you will take part in our core network projects which drive the growth of the company, tech and business wise. You'll gain networking and Switch u-arch knowledge while helping validate, optimize, and debug devices in different areas like Quality-of-Service, performance, logic correctness, and AI features. You will work closely with logic design, circuit design, and architects to ensure successful product development with aggressive product cycles, in both pre and post silicon stages.

You should have a good grasp of software development in different fields, such as Python Scripting, embedded software, and device firmware. It's important to have experience in a complex emulation environment and show a strong interest in creating, doing, and improving silicon validation plans.


What you will be doing:

Work in a combined design and verification team specializing in Switch Full Chip works.

Understand the Switch architecture and build on test plan accordingly.

Develop Full Chip test collaterals/suites, maintain regressions, debug failures and sign-off coverages.

Maintain test suites to facility Emulation and/or Silicon platforms checkout as well.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Computer Engineering, or Computer Science.

4+ years of experience.

Knowledge in Python and experience with C and C++ in a Linux environment.

Understanding and familiarity of networking designs and micro-architecture.

Outstanding ability to communicate, clearly present one's ideas, and able to work as a team.


Ways to stand out from the crowd:

Prior knowledge/experience with network protocols.

Experience with Object Oriented Programming, Operating Systems and Multi-Threaded application development.
This position is open to all candidates.
 
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
1 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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לפני 19 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Chip Design Engineer to join our Switch Silicon team for Verification / Design roles. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design, implement and verify the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Micro-architecture for RTL and simulation environment planning for units and modules.

Design/Verify RTL units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify, and simulate chip blocks/entities according to specifications.

RTL synthesis, timing, supporting verification, and silicon post TO activities.

Work closely with multiple teams within organizations such as Architecture, Full chip Micro-Architecture, BE, and FW.
Requirements:
B.Sc. in Electrical Engineering or Computer Engineering with high scores or equivalent experience.

1+ years of experience in RTL design and/or dynamic verification.

Completion of programming and logic design courses.

A great teammate with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
1 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Engineer to join our Switch Silicon team. As a Chip Design Engineer in our Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of rtl verification environments planning for units and modules.
Design RTL of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
RTL synthesis, timing, supporting verification, and silicon post TO activities.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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05/07/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We're looking for an exceptional senior Chip Design Engineer to join our Nitro team and help shape what comes next. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match- powering hundreds of thousands of businesses across 190 countries.

If you want to build silicon that leads the cloud world, this is where it happens.

As a Senior Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers AWS at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

Key job responsibilities
* Full ownership of one or more IPs within the product:
Micro-architecture definition.
RTL coding and debug.
Synthesis and timing closure.
Sign-off before tape-out.
* Supporting the Verification and Emulation teams: Test plan development, coverage review.
* Ensuring the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical Design.
Requirements:
Basic Qualifications:
- 6+ years of experience in chip design.
- Hands-on experience in micro-architecture and RTL design (Verilog / System Verilog).
- Scripting expertise in C*, Perl, Python, or TCL.
- BSc in Computer/Electrical Engineering.
- Strong communication and collaboration skills.
- Strong leadership skills and ability to own complex units.

Preferred Qualifications:
- Strong knowledge of protocols (AXI, CHI, DDR, Networking, PCIe).
- Experience with Network-on-Chip (NOC) architecture.
- knowledge with coherent and non-coherent fabric design.
- Comprehensive SoC development cycle expertise (Synthesis, STA, CDC, Lint).
- Knowledge of Design Automation tools and techniques.
- Advanced degree in related technical field.
This position is open to all candidates.
 
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