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1 ימים
חברה חסויה
Location: Caesarea
Job Type: Full Time
we are seeking a Lead System Architect to join our system architecture team and help define the next generation of our AI-SuperNIC scale-out chip.
AI scale-out communication is a critical element in modern data centers, and emerging standards such as Ultra Ethernet aim to address this challenge. This role focuses on defining a high-performance Smart NIC architecture optimized for GPU-centric AI workloads, with emphasis on low-latency, high-bandwidth data movement.
You will work across hardware and software domains, collaborating closely with AI, platform, driver, and VLSI teams to design a competitive scale-out networking solution.
Responsibilities:
Lead the software architecture and technical roadmap for or next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership across firmware, driver, and networking software development
Requirements:
BSc/MSc in Computer Science, Electrical Engineering, or a related field.
7+ years of experience in software architecture, networking software, or system software development.
Strong experience developing Linux kernel drivers, firmware, and user-space networking software.
Deep understanding of data center networking, including Ethernet, TCP/IP, routing, switching and congestion management
Proven experience defining software architectures that span hardware, firmware, kernel, and user-space components.
Strong programming skills in C/C++ and experience with Linux-based development environments.
Experience leading cross-functional technical initiatives and collaborating with hardware and system architecture teams.
Excellent analytical, debugging, and performance optimization skills.
Nice to Have:
Experience with RDMA technologies and low-latency networking architectures.
Experience with libfabric, libibverbs, RDMA-core, DPDK, SPDK, or similar infrastructure software.
Familiarity with GPU communication technologies such as GPUDirect RDMA, NCCL, NVLink, or UALink.
Experience optimizing communication for distributed AI/ML workloads.
Contributions to open-source networking or Linux kernel projects.
Experience working on SmartNICs, DPUs, NICs, or networking ASICs.
Deep understanding of GenAI/ML infrastructure and distributed workloads
This position is open to all candidates.
 
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חברה חסויה
Job Type: Full Time and Hybrid work
Lead the software architecture and technical roadmap for next-generation ultra low-latency AI-SuperNIC software stack, including drivers, firmware, libfabric, and libibverbs.
Define the partitioning and interfaces between hardware, firmware, Kernel drivers, user-space libraries, and AI frameworks.
Lead the design and implementation of high-performance networking, RDMA, and GPU-direct communication capabilities.
Drive software support for emerging technologies and standards such as UEC, UALink, MRC and RoCEv2 ecosystems.
Work closely with hardware, system architecture, and VLSI teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adopti
Requirements:
BSc/MSc in Computer Science, Electrical Engineering, or a related field.
7+ years of experience in software architecture, networking software, or system software development.
Strong experience developing Linux Kernel drivers, firmware, and user-space networking software.
Deep understanding of data center networking, including Ethernet, TCP/IP, routing, switching and congestion management
Proven experience defining software architectures that span hardware, firmware, Kernel, and user-space components.
Strong programming skills in C / C ++ and experience with Linux -based development environments.
Experience leading cross-functional technical initiatives and collaborating with hardware and system architecture teams.
Excellent analytical, debugging, and performance optimization skills.
Nice to Have:
Experience with RDMA technologies and low-latency networking architectures.
Experience with lib
This position is open to all candidates.
 
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חברה חסויה
Job Type: Full Time
We are seeking a Senior Software Embedded Engineer to join our Control Pannel. As a key member of the R D Embedded SW department, you will be entrusted with designing, coding, and optimizing software that powers sophisticated control panels in cutting-edge environments. Your role will span the full development lifecycle, from initial design and architecture through implementation, debugging, and integration with hardware teams. The ideal candidate will demonstrate a passion for innovation in Embedded systems, applying expertise to
Requirements:
BSc in Computer Science, Software Engineering, or related field from a leading university.
10+ years of experience in rt Embedded development.
Strong proficiency in C and modern C ++ ( C ++14+), with solid OOD and multi-threading/multi-process design skills.
Extensive experience with Embedded Linux (Yocto), including Kernel and driver development, user-space programming, and shell scripting.
Hands-on experience with Agentic AI frameworks, including autonomous systems, decision-based intelligence, or context-aware agents.
Ability to integrate AI capabilities into software development processes, including design, coding, and problem-solving.
Strong analytical mindset and ability to identify opportunities to enhance development efficiency and product quality using AI-driven insights
Experience with Python for automation and testing.
Familiarity with Agile development methodol
This position is open to all candidates.
 
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1 ימים
חברה חסויה
Location: Caesarea
Job Type: Full Time
we are seeking a Lead System Architect to join our system architecture team and help define NR-NEXUS, our next-generation AI inference platform.
Responsibilities:
Lead the software architecture and technical roadmap for NR-Nexus
Write system specifications for NR-Nexus product
Research AI infrastructure, SaaS platforms, model serving, and inference trends
Work with engineering to translate technical capabilities into product value
Work closely with engineering teams to optimize performance, scalability, and feature delivery.
Define performance goals and lead profiling, benchmarking, and optimization efforts for GenAI and distributed AI workloads.
Collaborate with customers, partners, and open-source communities to ensure ecosystem compatibility and adoption.
Mentor software engineers and provide technical leadership
Requirements:
7+ years of software engineering experience, including 3+ years in software architecture or technical leadership.
Strong experience with Kubernetes-based platforms and cloud-native architecture.
Deep understanding of Gen AI/LLM infrastructure and distributed workloads
Experience designing management software or SaaS platforms for production systems.
Strong background in distributed systems, microservices, APIs, and automation.
Hands-on experience with observability stacks, monitoring, logging, alerting, and SLA/SLO tracking.
Experience with CI/CD, deployment automation, upgrades, and rollback mechanisms.
Good understanding of security, authentication, authorization, and integration with customer data center environments.
Nice to have:
Deep understanding of GenAI / LLM inference infrastructure, including model serving, scaling, batching, latency, throughput, and resource utilization.
Experience with production AI inference clusters using GPUs, AI accelerators, or other specialized compute infrastructure.
Understanding of how distributed inference systems operate, including scheduling, load balancing, autoscaling, failover, and cluster-level observability.
Experience with LLM serving frameworks such as vLLM, Triton Inference Server, TensorRT-LLM, or similar.
Familiarity with GPU/accelerator orchestration, device plugins, resource scheduling, and cluster capacity planning.
Familiarity with GPU communication technologies such as GPUDirect RDMA, NCCL, NVLink, or UALink.
Experience optimizing communication for distributed AI/ML workloads.
Knowledge of Prometheus, Grafana, OpenTelemetry, Helm, Argo CD, Istio, KServe, Kubeflow, or similar tools.
Experience deploying software in on-prem, edge, private cloud, or hybrid environments.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Performance Architect
What You'll Do:
Join our Silicon One architecture team, the core of silicon development. Our architects manage all aspects of system chip development and provide specifications to various development teams. In this role you will:
Define the features and specifications of future devices.
Utilize a data-driven approach to model and analyze networks of tomorrow, providing optimal solutions for our customers.
Model, analyze, and present simulation results for cutting-edge networking solutions across various use cases.
Apply strong networking research skills and a robust theoretical background to your work.
Who You'll Work With
You will be part of our Silicon One architecture team, which is central to our ASIC group.
Our team, which operates with a startup mentality within a stable and leading corporation, drives the development of next-generation networking devices.
Our design center is unique, hosting all silicon hardware and software development disciplines at one site. We are revolutionizing the industry by building a new internet for AI networks and the 5G era, with a unified, programmable silicon architecture that will underpin all of our future routing and switching products.
Our devices are engineered to be adaptable across service providers and web-scale markets, designed for both fixed and modular platforms. They deliver high speed without sacrificing programmability, buffering, power efficiency, scale, or feature flexibility. We are set to be a transformative technology for decades to come.
Requirements:
Minimum Requirements
Software Development Skills: Proficiency in C++ and Python.
Research Skills: Experience researching networking solutions.
Self-Learning Ability: Capability to quickly grasp new concepts and technologies from papers and specifications.
Presentation Skills: Effective in communicating and presenting complex technical concepts.
Curiosity & Innovation: A passion for innovation, with strong analytical skills and meticulous attention to detail.
Team Player: Proven ability to collaborate and contribute to team goals.
Technical Documentation: Strong writing skills for creating technical documents.
Preferred/Advantageous Qualifications
Versatility: Adaptable to diverse tasks within the networking architecture domain.
Network Modeling Experience: Familiarity with tools like ns-3 or OMNeT++.
AI Knowledge: Familiarity with AI concepts.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Required PHY Firmware Technical Leader
Meet the Team:
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices.
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
8+ years of relevant experience in system and firmware.
Strong system-oriented mindset with a multi-disciplinary approach
Ability to work on complex problems while multitasking across domains
Preferred Qualifications:
Experience with C++, Python.
Familiarity with processor architecture
Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
3+ years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. Our Silicon One is a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering or equivalent practical experience.
3+ years of experience as a hardware/board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed and multi-layer PCB design.
Hardware-oriented, with experience in measurements, characterization, and using lab equipment and hands-on experience in PCB bring-up and systematic debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
We are looking for an experienced Design Verification engineer to join our DFT team and help establish and grow DFT DV activity in the SiliconOne DFT team. This role is relevant for engineers with experience in DV roles, either in DFT DV or in other verification domains, who are interested in becoming familiar with DFT design, verification methodologies, and the challenges of validating testability features in advanced silicon.
Your Impact
Establish and drive DFT verification activities within the SiliconOne DFT team.
Develop verification plans, environments, checkers, assertions, and coverage models for DFT features.
Verify DFT architecture and implementation in close collaboration with DFT, design, architecture, and verification teams.
Work on verification of scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features.
Debug complex pre-silicon issues across RTL, verification environments, and DFT logic.
Contribute to scalable methodologies, reusable verification components, and best practices for DFT DV.
Help bridge between general DV methodologies and DFT-specific design and verification needs.
Requirements:
Minimum Qualifications
B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field.
5+ years of experience in design verification roles.
Strong experience with SystemVerilog and UVM-based verification environments.
Experience developing verification plans, coverage models, assertions, and debug flows.
Strong communication skills and ability to work closely with cross-functional teams.
Motivation to learn DFT concepts and become a key contributor in the DFT DV domain.
Preferred Qualifications
Experience with DFT DV, including verification of scan, MBIST, JTAG/IJTAG, ATPG-related logic, or test controllers.
Familiarity with DFT concepts such as scan insertion, memory BIST, ATPG, boundary scan, and silicon test flows.
Experience with complex SoC verification, networking silicon, or high-performance AI-driven silicon.
System-level understanding of large-scale chip architecture and integration.
Ability to build new methodologies and establish verification activity from the ground up.
High attention to detail, ownership mindset, and willingness to grow into new technical domains.
This position is open to all candidates.
 
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16/06/2026
חברה חסויה
Location: Caesarea
Job Type: Full Time
our company, a Sisram Medical company, is a global leader in medical-aesthetic technologies, with over 25 years of experience in energy-based devices (EBD). Over the years, our company has evolved into an integrated aesthetic and wellness ecosystem that combines medical devices, injectables, diagnostics, and personalized skincare. The company operates in a dynamic, innovation-driven environment, merging advanced technology with deep clinical understanding to create holistic solutions for aesthetic clinics. our companys headquarters are in Caesarea, Israel, with business operations in more than 100 countries worldwide.
* Establish, build, and lead the V&V team from the ground up, including defining methodologies, processes, and best practices
* Manage and mentor a small and growing team of V&V engineers
* Lead end to end, comprehensive verification and validation activities for multidisciplinary medical devices, combining technologies such as laser, RF, ultrasound, and physics-based systems
*  Define, author, and execute rigorous TEST strategies, validation plans, and protocols for complex systems
* Ensure full compliance with medical device regulatory standards, including documentation, traceability, and validation processes
* Partner closely with matrixed cross-functional teams including Mechanics, Hardware, Software, system Engineering, Regulatory, Clinical and Quality
* Drive continuous improvement of TEST methodologies, modern tools, and automation capabilities
* Support end-to-end product lifecycle activities including design verification, system validation, and post-market activities.
* Partner with Operations and NPI (New Product Introduction) groups to ensure seamless transfer from design verification to manufacturing line validation
* Manage relationships and scheduling with External Certified TEST Houses for safety, EMC, and environmental compliance testing
Requirements:
* B.Sc. in Biomedical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or a related exact science discipline - Mandatory
* At least 5 years of hands-on experience leading V&V / QA, testing complex multidisciplinary systems - mandatory
* Proven experience working in medical device companies - mandatory
* Direct experience with systems integrating multiple technologies (e.g., laser, RF, ultrasound, or similar physical technologies)
* Previous experience as a lead / senior role or strong potential for leadership - must
* Prior experience in building or scaling testing activities / teams - strong advantage
* Strong understanding of V&V processes within regulated environments (FDA, CE, ISO13485, etc.) - mandatory
* Deep familiarity with medical device safety and software standards, specifically IEC 60601 (Medical electrical equipment safety) and IEC 62304 (Medical device software lifecycle) - Highly Preferred
*  Hands-on experience implementing or working with Application Lifecycle Management (ALM) platforms, defect tracking tools (e.g., Jira), and TEST automation frameworks or data analysis tools (e.g., MATLAB, PythongreenTxtBg!) - Strong Advantag
*  Strong leadership capabilities with the ability to build a team and drive it forward
* Deep, fundamental understanding of system -level methodologies for complex, multi-tiered / multidisciplinary products
* Hands-on, proactive, agile approach with the ability to operate in a rapidly growing, evolving development environment
* Strong cross-functional communication and stakeholder management skills to bridge design, quality and regulatory groups
* High level of personal ownership, structure organizational skills, and uncompromising attention to detail
* Ability to balance strategic thinking with hands-on execution
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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