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לפני 23 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it.
Requirements:
3- 5 years experience.
Ability to ramp up verification environments from scratch
Experience with UVM, System Verilog - Must
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage.
This position is open to all candidates.
 
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לפני 23 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it.
Requirements:
At least 5 years experience.
Ability to ramp up verification environments from scratch
Experience with UVM, System Verilog - Advantage
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage.
This position is open to all candidates.
 
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20/05/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time and Hybrid work
We are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Position location: in our Haifa or TLV offices, at least 2 working days at Haifa site (Hybrid model)
Responsibilities:
Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.
Requirements:
B.Sc. in Electrical/Computer Engineering or equivalent.
5+ years of experience as a VLSI Verification Engineer.
Expertise in System-Verilog and UVM.
Strong software development skills and the ability to develop reusable verification components and utilities.
Strong organizational and planning skills, with the ability to prioritize and drive verification projects to completion.
Effective communicator with a structured, detail-oriented approach to problem-solving and collaboration.
Advantages:
Experience with Git, Python, code templating methods, and open-source verification workflows.
Familiarity with full-chip level aspects of VLSI verification (reset architecture and sequences, power domains and modes, etc.).
Experience in firmware verification, including emulation-based verification on FPGA.
Experience with formal verification or mixed-signal simulation.
This position is open to all candidates.
 
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26/05/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking to hire a talented Verification Engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips. If you are motivated and skilled in VLSI and excited about AI, we want to meet you!
Responsibilities:
Collaborate with architecture and design teams to define and implement comprehensive testcases for NN processor and SoC blocks and flows.
Maintain, enhance, and scale the UVM‑based verification environment to support efficient and robust verification.
Own end‑to‑end verification of system flows to ensure the design is fully functional, correct, and meets performance expectations.
Drive root‑cause analysis and debug across RTL, testbench, and system layers to ensure high‑quality design closure.
Define, track, and close functional and performance coverage to guarantee verification completeness.
Continuously improve verification methodologies, automation, and workflows to increase productivity and coverage efficiency.
Requirements:
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or a related field from a leading university.
3+ years of hands‑on experience in ASIC design or verification.
Strong knowledge of SystemVerilog and the UVM verification methodology.
Experience with SoC‑level verification is an advantage.
Excellent problem‑solving abilities and strong communication skills.
Proficient in written and spoken English and comfortable collaborating with a global team.
This position is open to all candidates.
 
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20/05/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We're looking for exceptional engineers to join our Pre-Silicon Verification team - the team that sits at the very center of the chip development lifecycle. Verification in our company isn't a downstream checkpoint - it's the connective tissue that spans the entire product journey:
It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written
It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack
It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality
It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development
What sets us apart:
Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips.
Cutting-edge methodologies drive every stage of our verification process
Relentless innovation - we don't settle; we actively seek new approaches that raise the bar on silicon quality.
We do classic functional verification(SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality.
Performance optimization at all levels it is at the heart of our targets on top of logical correctness verification.
If you want to be at the nerve center of chip development - where your work connects every discipline and powers the backbone of AWS Graviton - this is your team.
Requirements:
Basic Qualifications
- Electrical/Computer Science engineer.
- 5+ years of experience with RTL verification.
- Knowledge of Hardware Verification concepts and tools (UVM , Coverage Driven verification).
- Sound understanding and knowledge of object-oriented programming concepts, Verilog/SystemVerilog/Specman.

Preferred Qualifications
- Knowledge of the following programming languages: Perl/Bash/TCl/Python.
- Knowledge of PCIe, Processors, Ethernet, DDR.
This position is open to all candidates.
 
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.

Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.

5+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered.

Experience in full and cluster-level verification is an advantage.

Self-motivated, ability to work independently and drive tasks to completion.

A great teammate with strong communication and interpersonal skills.


Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Knowledge in Networking.

Great interpersonal skills.
This position is open to all candidates.
 
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לפני 3 שעות
Job Type: Full Time
We are looking for best-in-class Chip Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing our groundbreaking and innovative chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you will be doing:

Join the Tel Aviv or Beer-Sheva group, working on RiscV processors platform.

Verification for chip blocks according to specifications under challenging constraints and with high orientation to power, area and performance.

Daily work might involve any or all aspects of chip development including verification, integration, debug

Work closely with firmware and other groups around the globe.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.

High Level of English.

Ability to work as part of a team.


Ways to stand out from the crowd:

Experience in RTL Frontend ASIC Verification (Chip Design).

Background and knowledge in system level aspects.
This position is open to all candidates.
 
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15/06/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Post-Silicon Validation Engineer
About The Position
We build cutting-edge radar chipsets for next-generation automotive sensing systems. As a Post-Silicon Validation Engineer, you will play a critical role in bringing complex mixed-signal ICs from silicon to system readiness.
Responsibilities
Perform validation of advanced radar ICs from bring-up through full functional and performance testing
Translate system and chip-level requirements into comprehensive validation plans and test cases
Develop automated test environments using lab instrumentation and custom scripts
Execute silicon bring-up and validate key subsystems (clocking, power, CPU, interfaces, sensors)
Perform electrical and parametric validation, including high-speed, power, and interface testing
Run characterization across PVT conditions and analyze large datasets
Debug complex silicon issues and work closely with design, verification, and system teams
Support device readiness for system integration and productization.
Requirements:
B.Sc in Electrical Engineering or a relevant field
Strong background in IC validation (digital / analog / mixed-signal) - Min. 3 years
Hands-on experience with lab equipment (oscilloscopes, analyzers, power tools, thermal setups)
Solid understanding of HW validation methods and structured test design
Familiarity with characterization and data analysis workflows
Experience in scripting / automation for test execution - Python is an advantage
Ability to debug at system, subsystem, and block level
Highly analytical and detail-oriented
Proactive problem solver in complex silicon environments
Capable of working independently
Strong collaboration across multidisciplinary teams
Preferred Qualifications:
Board design experience
Knowledge in high speed interfaces such as Ethernet and LPDDR.
This position is open to all candidates.
 
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1 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Senior Chip Design Verification Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:
Take a crucial part in developing our next-generation chip controller and boot.
Design and verification with challenging multi-discipline context.
Take part in the development of all our networking and GPU networking chips and systems.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering.
5+ years of validated experience in ASIC Verification.
High Level of English.

Ways to stand out from the crowd:
Background in Specman.
Knowledge in HDL (Verilog/VHDL).
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
This position is open to all candidates.
 
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1 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
Join us and become a pivotal part of our Networking Silicon engineering team in Tel Aviv, Israel. We are renowned for developing the industry's top high-speed communication devices, known for their outstanding efficiency and minimal latency. This role offers an outstanding opportunity to be involved in groundbreaking projects, collaborating with versatile experts to foster innovation and excellence. As a Senior Chip Design Verification Engineer, you will be immersed in a dynamic and encouraging environment where your efforts will have a meaningful impact.

What you'll be doing:

Play a crucial role in developing our next-generation chip controller.

Engage in building and verification tasks within a challenging, multi-disciplinary context.

Collaborate closely with cross-functional teams to advance our networking and GPU networking chips and systems.

Drive the implementation of sophisticated verification environments to ensure flawless functionality.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Computer Engineering, Electrical Engineering, or Communication Engineering.

0-4 years of proven experience in ASIC Verification.

High proficiency in English.

Demonstrated ability to work well within a team, exhibiting strong communication and interpersonal skills.

A proactive and ambitious approach, with strong attention to detail and a dedication to excellence.


Ways to stand out of the crowd:

Background in Specman.

Knowledge in HDL (Verilog/VHDL).

Knowledge in industry Standard Protocol such as I2C, GPIO and AMBA.
This position is open to all candidates.
 
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לפני 3 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.
Requirements:
What we need to see:

BSc in Electrical/Computer Engineering or MSc in Mathematics.

Excellent analytical, logical reasoning and problem-solving skills.

Strong debugging and analytical skills.

Strong communication and interpersonal skills are required.


Ways to stand out from the crowd:

Formal verification work experience.

Knowledge of digital logic.
This position is open to all candidates.
 
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