דרושים » תוכנה » Logic Design Engineer

As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in our company, including support for customers who require specialized security solutions for their cloud services.

Take part in the development of cutting-edge products within a disruptive system architecture. You will have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. We provide a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world. Annapurna Labs, as part of us, is looking for talented engineers to help us develop a semiconductor platform based on a revolutionary architecture.

Looking for exceptional senior engineers to join the top-tier team that is developing the next generation semiconductor platform, based on a revolutionary architecture. Engineers will participate in design activities, working on the next generation of our products.

You are invited to take part in developing, integrating and deploying cutting-edge technologies, starting with identification and definition of project requirements, architecture, feature development, and collaboration with the different groups.
Your design will be integrated into the nitro SoC, on millions of servers worldwide. This is an opportunity to have a large-scale impact.
As a VLSI engineer and a member of the Nitro project, you will have an impact over the device through its entire lifecycle, from the product definition stage to mass production. You will work in close collaboration with multiple groups, including Architecture, Software, Verification, Backend, and DFT.

Key job responsibilities
*Full ownership of one or more IPs within the product:
-Micro-architecture.
-RTL coding and debug.
-Synthesis and timing closure.
-Sign-off.
* Supporting the Verification and Emulation teams: Test plan, Coverage review.
* Ensuring that the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical design.

we are the global leader in control systems for quantum computing, a field on the verge of exponential growth, bringing about opportunities like those made possible with the invention of classical computing 50 years ago.
We are assembling the strongest team of professionals in the world with the goal of revolutionizing how quantum computers are built and controlled and accelerating their arrival. we are backed by top-tier investors such as Battery Ventures, TLV Partners, Red Dot Capital, and Avigdor Willenzs investment group.
We are looking for a super talented engineer to join our team and build our company's architectural model of a quantum control system.
We are looking for a motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Working in all fronts - high-level architectural solutions to low-level design constraints
Working across multiple teams and methodologies
Designing a complex IP to be used both internally by various R&D teams and externally for our customers as a stand-alone product
Designing a flexible and integration-able model to allow referencing from various programming languages (UVM, Java, Python, Kotlin and C++) as well as coupling it to a behavioral quantum simulator.

Required RTL Design Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use Application-Specific Integrated Circuit (ASIC) design experience to be part of a team that develops complex ASIC System-on-Chip (SoC) intellectual property from proof-of-concept to production. This includes creating IP Level microarchitecture definitions, Register-Transfer Level (RTL) coding and all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies, including design generation automation. You will collaborate with members of architecture, software, verification, power, timing, synthesis design for testing etc. You will develop/define design options for performance, power and area.
Responsibilities
Define the IP microarchitecture level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
Perform RTL development (coding and debug in Verilog, SystemVerilog).
Conduct function/performance simulation debug and Lint/CDC/FV/UPF checks.
Engage in synthesis, timing/power closure, and ASIC silicon bring-up.
Contribute to verification test plan and coverage analysis of block and SoC-level.

We are looking for an excellent SW Engineer to join the InfiniBand Switch and NVLink Core FW group in Tel-Aviv / Raanana. As the team member, you will be part of a major development effort for the next-generation networking products. The verification team develops cutting-edge networking features for cloud, HPC and storage. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?
What you will be doing:
As a SW Engineer, you will part of a group of firmware verification engineers, using your expertise in C++ and Python in an Agile methodology.
Develop the verification process, aligning with quality standards and project timelines.
Design and implement new features in the core of Switch and GPUs
Drive and facilitate the planning, scheduling, and execution of the project and activities of the team
Collaborate with architecture and different software design teams as part of the software development lifecycle.
Work in pre and post-silicon development environments of next-generation networking products.
Gain a deep understanding of networking technology, system debugging and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our FW switching products to shine in customers view.

We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.
What youll be doing:
Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon, GPU and HCA.
Plan and Design Verification units/blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, Micro-Architecture, and FW-interaction with organization-wide groups.

Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Were looking for an experienced SW Team Manager to join our Simulators Team, where you'll lead the design and development of our hardware simulators - functional and performance models that serve as the source of truth, drive architectural exploration and compiler optimization.
Our simulators model diverse cores within a cutting-edge SoC designed to accelerate Big Data and Database Analytics.
You will collaborate closely with hardware and software teams, contributing to co-design efforts that influence architecture, tooling, and system-level behaviour.
Responsibilities:
Lead & grow a team of experienced engineers
Develop new hardware simulators and continue evolving existing one.
Collaborate with Architecture, VLSI, and Software teams to drive co-design initiatives.
Provide insights that influence chip architecture, compiler optimization, and system-level performance.
Develop tools that drive the chip development cycle.

We are looking for an excellent Firmware Engineer to join the NVLink FW group. you will be taking part in designing, implementing and leading major development firmware features, delivering the next-generation networking & GPU products. The Firmware team develops cutting-edge networking features for AI, Cloud & HPC. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced. Are you ready for the challenge?
What you will be doing:
Collaborate with architecture and different software design teams as part of the software development lifecycle.
Design and implement new features in the core of NVLINK firmware.
Work in pre and post-silicon development environments of next-generation networking products.
Gain a deep understanding of system debugging, networking technology, and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our FW switching & GPU products to shine in customers view.

We are seeking to hire an excellent Firmware Engineer to join the GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to take part in designing, implementing, and driving major development firmware features, delivering the next-generation GPU networking products.
We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?
What you will be doing:
Design and implement new features in the core of our GPU firmware.
Collaborate with architecture and different software design teams throughout the software development lifecycle.
Work in Pre & Post-silicon development environments of next-generation GPU products.
Gain a deep understanding of system debugging, networking technology, and stacks, as well as the HW/FW/SW relationship.
Innovate! Bring our FW switching products to shine in customers view.
Collaborate with other R&D teams around the globe.

We are looking for a highly experienced a hands-on Compiler Engineer who embodies ambition and positivity.
Someone who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfill the evolving needs of our expanding customer base.
Responsibilities:
Develop our company's compiler from a proprietary quantum language to a proprietary processor tailored to realize and accelerate quantum computing.
Take on complex optimization challenges at the core of our unique compiler, focusing on real-time applications, hybrid quantum/classical algorithms, and parallel processing.
Conduct rigorous testing, debugging, and profiling to ensure the performance and correctness of compiler outputs.
Hands-on development and debugging of software to optimize the utilization of limited hardware resources, enabling the scaling of quantum computing systems and improving quantum algorithm performance on our cutting-edge quantum orchestration platform.
Collaborate closely with hardware, software and architecture teams to ensure seamless software-hardware integration, directly enhancing system capabilities and performance.