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לפני 10 שעות
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a talented Applied Algorithms & Operational Researcher to join our innovative team. As a member of our team, you will be responsible for analyzing extensive data, developing new metrics for our customers' vast data sets, and creating tools to classify and analyze the data effectively.
Responsibilities:
Conduct comprehensive performance analysis of automotive radar systems, including data collection, processing, and interpretation. Evaluate system performance in various scenarios.
Develop and implement algorithms and tools to process and analyze radar data. Extract relevant performance metrics and provide meaningful insights into system behavior and limitations.
Collaborate with the development team to identify areas for improvement and optimization.
Conduct radar system performance tests and validation procedures. Create test plans, define test cases, and analyze results to ensure system performance meets specified requirements. Identify potential issues, troubleshoot problems, and propose solutions.
Create concise reports, technical documents, and presentations summarizing performance analysis results and recommendations. Effectively communicate findings to cross-functional teams, including engineers, managers, and other stakeholders. Contribute to product documentation and technical specifications.
Requirements:
BSC/ MSc in Electrical Engineering, Computer Science or other related field
Extensive knowledge of radar principles, signal processing, and performance metrics
Proficiency in programming languages such as Python, MATLAB
Analytical and problem-solving Skills
Great verbal and written communication skills.
Excellent verbal and written communication abilities, with the capability to effectively present technical information in a clear and concise manner
Attention to Detail
Strong organizational skills to efficiently manage multiple tasks and prioritize accordingly
This position is open to all candidates.
 
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לפני 10 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a Chip Test Engineer.
The Chip Test Engineer plays a crucial role in designing, developing, and implementing automated test for IC chips and systems for Automotive industry. The Test Engineer is responsible to define and develop tests, design test features, program test scripts, and analyze test results to ensure the quality and functionality of products. The Test Engineer collaborates with cross-functional teams to troubleshoot issues, improve test processes, and support product development efforts.
Responsibilities:
Develop and implement test strategies, plans, and procedures for ATE systems to ensure comprehensive testing of ICs.
Design and develop test features, test programs, and test scripts for automated test environment (ATE) based on product specifications and requirements.
Collaborate with design engineers, product manager, production vendors and manufacturing teams to understand product functionality, performance requirements, and testability considerations.
Conduct feasibility studies and risk assessments to identify potential challenges and develop mitigation strategies for test development and implementation.
Develop test program based on code languages C++ ,Java and Python.
Debug, troubleshoot, and resolve issues with ATE hardware, software, and test scripts to ensure reliable and accurate test results.
Analyze test data and results to identify trends, anomalies, and potential defects, and provide feedback to design and development teams for product improvement.
Develop and maintain documentation for test procedures, specifications, and configurations.
Collaborate with vendors and suppliers to evaluate and select ATE equipment, components, and software tools that meet project requirements and performance standards.
Stay abreast of industry trends, advancements in test technologies, and best practices in automated testing to drive continuous improvement in test processes and methodologies.
Requirements:
Bachelor's degree in electrical engineering, computer engineering, or a related field.
Proven 5+ years of experience in automated test development, preferably in the semiconductor or electronics industry.
Experience in programming languages such as C/C++/JAVA/Python.
knowledge of ATE hardware platforms (e.g., Advantest or Teradyne) and test methodologies (e.g., parametric testing, functional testing).
Familiarity with electronic measurement instruments (e.g., oscilloscopes, multimeters, signal generators) and test techniques for analog and digital circuits. Advantage RF test.
Excellent problem-solving skills and the ability to troubleshoot complex issues with ATE systems and test setups.
Strong communication and interpersonal skills, with the ability to work effectively in cross-functional teams.
Detail-oriented with a focus on quality, accuracy, and efficiency in test development and execution.
Ability to work independently, prioritize tasks, and manage multiple projects simultaneously in a fast-paced environment.
Preferred Qualifications
Experience in Mix-signals, high-speed interfaces testing fields.
Experience with test data analysis tools (e.g JMP, Spotfire, Yield HUB, Silicon Dash).
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness
Requirements:
what we need to see:
b.sc degree or equivalent experience in Computer Science, computer engineering, or electrical engineering
10+ years of overall professional experience and 4+ years of experience managing managers or senior engineers.
proficient in Python, C, C ++ with the technical depth to guide and mentor the team
experience with regression systems and their optimizations
experience with networking protocols, mainly ethernet
experience with virtualization technologies
strong analytical, debugging, and problem-solving skills with meticulous attention to detail
experience with Embedded sw development
excellent interpersonal skills and the ability to multitask in a dynamic environment with shifting priorities
self-motivated and well-organized
ways to stand out from the crowd:
advanced understanding in ethernet protocols and rdma
experience with cloud and ai workload optimization
proficiency in continuous integration (ci) methodologies and tools such as gerrit, jenkins, and gitlab
experienced in TEST generation and coverage methods and metrics
background in Linux Kernel, security protocols
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Realize your potential by joining the leading performance-driven advertising company!
As a Staff Algo Data Engineer on the Infra group, youll play a vital role in develop, enhance and maintain highly scalable Machine-Learning infrastructures and tools.
How youll make an impact:
As a Staff Algo Data Engineer Engineer, youll bring value by:
Develop, enhance and maintain highly scalable Machine-Learning infrastructures and tools, including CI/CD, monitoring and alerting and more
Have end to end ownership: Design, develop, deploy, measure and maintain our machine learning platform, ensuring high availability, high scalability and efficient resource utilization
Identify and evaluate new technologies to improve performance, maintainability, and reliability of our machine learning systems
Work in tandem with the engineering-focused and algorithm-focused teams in order to improve our platform and optimize performance
Optimize machine learning systems to scale and utilize modern compute environments (e.g. distributed clusters, CPU and GPU) and continuously seek potential optimization opportunities.
Build and maintain tools for automation, deployment, monitoring, and operations.
Troubleshoot issues in our development, production and test environments
Influence directly on the way billions of people discover the internet.
Requirements:
To thrive in this role, youll need:
Experience developing large scale systems. Experience with filesystems, server architectures, distributed systems, SQL and No-SQL. Experience with Spark and Airflow / other orchestration platforms is a big plus.
Highly skilled in software engineering methods. 5+ years experience.
Passion for ML engineering and for creating and improving platforms
Experience with designing and supporting ML pipelines and models in production environment
Excellent coding skills - in Java & Python
Experience with TensorFlow - a big plus
Possess strong problem solving and critical thinking skills
BSc in Computer Science or related field.
Proven ability to work effectively and independently across multiple teams and beyond organizational boundaries
Deep understanding of strong Computer Science fundamentals: object-oriented design, data structures systems, applications programming and multi threading programming
Strong communication skills to be able to present insights and ideas, and excellent English, required to communicate with our global teams.
Bonus points if you have:
Experience in leading Algorithms projects or teams.
Experience in developing models using deep learning techniques and tools
Experience in developing software within a distributed computation framework.
This position is open to all candidates.
 
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לפני 10 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a talented Hardware Engineer to join our innovative team.
Responsibilities:
Design, develop, and validate hardware boards for advanced radar and chip-based systems, with a strong focus on digital circuitry and power supply design.
Perform hands-on lab work (HO), including board bring-up, debugging, troubleshooting, repair, and continuous improvement of existing hardware.
Define, write, and execute comprehensive test plans and test setups for board-level validation.
Analyze test results, characterize performance, and document findings, including detailed test reports, failure analysis, and corrective actions.
Support schematic design activities and contribute to the development and maintenance of design environments and databases for EDA tools.
Experience with SI/PI simulation tools.
Collaborate closely with lab technicians, engineers, and cross-functional teams to ensure efficient execution of lab activities and project goals.
Take an active role in prioritizing tasks, driving technical decisions, and owning deliverables end-to-end.
Requirements:
B.Sc. in Electrical Engineering or a related field.
Hands-on experience in hardware development and board-level design.
Strong lab experience: debugging, measurements, and use of lab equipment (oscilloscopes, power supplies, etc.).
Experience with digital hardware and power systems (power supplies, regulators, etc.).
Experience writing and executing test plans and analyzing results.
Familiarity with schematic design tools and managing design environments/databases- an advantage.
Ability to work independently, set priorities, and operate in a hands-on, fast-paced environment.
Strong teamwork and communication skills, especially in lab-oriented collaboration.
This position is open to all candidates.
 
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26/03/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are seeking a highly motivated high-performance system architect to join our team of experts and help shape the future of high-performance and ml / ai computing. our next-generation nvl systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in ai research to high-performance clusters used at almost every industry today, such as car and pharmaceutical. as a high-performance system architect at nvidia, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.
what youll be doing:
define the nvl system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).
research of various solutions to enable the next large-scale-high-performance computing clusters. the position spans over various layers from algorithms, software, firmware, and hw.
developing models for simulations and performance testing, analysing the results and development of future hw and sw.
collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.
Requirements:
what we need to see:
b.sc, m.sc, or ph. d degree in Computer Science, Computer Engineer, or electrical engineer.
at least 5 years of industry or research experience in computer networks.
excellent understanding of large-scale networks behaviour and the effect of distributed computing workloads effect on the network.
experience in development of simulation environments.
possess strong managerial, problem solving and critical thinking skills.
ability to work and operate in a highly dynamic environment.
partner with multiple groups in the organization.
ways to stand out of the crowd:
strong understanding in network protocols - such as infiniband, ip, tcp and roce and network topologies.
good knowledge in Python, C ++.
good knowledge with ai models.
familiarity with hpc environments, routing algorithms, omnet++ and ns3 simulation environments.
This position is open to all candidates.
 
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לפני 10 שעות
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a talented Radar System Engineer to join our innovative system team. As a member of our team, you'll work on multidisciplinary system design, which combines cutting edge RF, digital, signal processing, software, hardware and chips development.
Responsibilities:
Participate in the development and production of radar sensors
Debug Radar ASIC platforms and processors
Develop subsystem specifications and process flows
Simulate and validate Radar system performance
Solve diverse complex problems and help in the debugging and integration process
Support and manage the product evaluation process involving customers.
Interface with multi-disciplinary product development team in support of design, integration and test of automotive radar systems
Requirements:
B.Sc in Electrical Engineering or equivalent (Computer science)
At least 4 years' experience as a System Engineer
Hands-on experience in mixed signals board design for complex FPGAs / ASICs / Processors
Hands-on experience in Radar or other relevant fields like Sonar, Communications, or EW
Hands-on Matlab/ Python experience
Readiness to work in a challenging startup environment
Entrepreneurial, self-directed and motivated
Preferred Qualifications
Hands-on Radar experience
Architecture experience
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers google's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of google's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a design technology co-optimization (dtco) engineer, you will bridge the gap between process technology and product architecture to define the next generation of datacenter-class silicon. you will be responsible for extracting maximum process entitlement by evaluating advanced logic nodes and emerging transistor architectures.in this role, you will conduct place and route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. you will collaborate with foundry, ip, and architecture teams to identify power, performance, and area (ppa) bottlenecks and drive system technology co-optimization (stco) initiatives.your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify ppa gains. by navigating the trade-offs between process complexity and design performance, you will ensure googles hardware achieves efficiency and power density.the ai and infrastructure team is redefining whats possible. we empower google customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers include googlers, google cloud customers, and billions of google users worldwide. we're the driving force behind google's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
execute high-fidelity place and route experiments to evaluate the ppa impact of advanced process features, library architectures, and design rule variations on datacenter-class ip.
drive design technology co-optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track he
דרישות:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in physical design (rtl-to-gds) or technology development, focusing on advanced nodes (e.g., 7nm, 5nm, or below).
experience with industry-standard place and route (p&r) tools and static timing analysis (sta) tools.
experience in cmos device physics, finfet/nanosheet architectures, and the impact of layout parasitics on ppa.
experience in scripting and automation using tcl and Python (or PERL ) to manage design sweeps and data extraction.
preferred qualifications:
master's degree or phd in electrical engineering, computer engineering or Computer Science, with an emphasis on computer architecture.
experience in design technology co-optimization (dtco), including standard cell library characterization, metal stack optimization, and evaluation of scaling boosters (e.g., backside power delivery).
experience working with major foundry technology files (pdks) and interpreting design rule manuals (drm) to guide physical im המשרה מיועדת לנשים ולגברים כאחד.
 
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13/04/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Accelerator - Application Engineer
Description
A leading high-tech company, developing top-performing AI processors for edge devices in various industries. We combine an extensive understanding of the way neural networks operate, with our teams expertise in SW and HW architecture, to develop products that transform the way we use machines to perceive and analyze the world around us.
Our company is led by a group of experts from a wide range of disciplines, combining experience from elite intelligence units as well as leading tech companies in Israel and abroad, with a track record of executing complex projects from the ground up. As an AI chip company, we believe that AI can help us create a better, safer, more productive, and more convenient world. For this to happen, AI needs to be available at scale and on the edge.
To this end, our team of hardware and software leaders is developing top-performing AI processors, dedicated to AI tasks on edge devices in a wide variety of applications and industries including smart cities, automotive, manufacturing, agriculture, retail, and many more. With hundreds of customer programs around the world, and a wide ecosystem of software and hardware partners, we are leading the edge AI revolution.
In this position
In this role, you would work very closely with both customers and internal teams. On the technical side, you would build demos and reference applications in C++, Python, and GStreamer, helping showcase and enable different AI use cases, including vision AI and generative AI.
You would also support customers as they evaluate and deploy our technology, helping them optimize models, integrate with our accelerator stack, and troubleshoot issues. Internally, the role acts as a bridge between customers, R&D, product, and business teams to make sure technical requirements and feedback are clearly communicated.
Responsibilities
Design and develop end-to-end demo and reference applications in C++, Python, and GStreamer for Vision AI and GenAI use cases.
Own deep technical expertise across the accelerator stack, including Dataflow Compiler, runtime, model quantization, performance optimization, and roadmap direction.
Support deployment and optimization of deep learning models, including transformer-based and generative models.
Lead technical alignment processes with customers from evaluation through deployment.
Act as primary technical focal point for selected strategic accounts.
Provide structured and high-quality pre-sales and post-sales technical support.
Drive issue resolution across Customer Success and R&D, ensuring clear ownership and follow-up.
Translate business needs into technical requirements and collaborate with Product to influence roadmap decisions.
Ensure excellent response time and support quality for customer escalations.
Define best practices, documentation, and internal workflows for application engineering.
Requirements:
1+ years of hands-on experience as a software, algorithm, or embedded developer.
Programming languages: Python, C/C++, GStreamer
Excellent communication skills and customer-facing confidence.
Strong interest in AI and deep learning technologies.
Highly organized with ability to manage multiple parallel topics and stakeholders.
Fluent English.
Advantages
Customer-facing technical role experience such as FAE, Solutions Engineer, or Application Engineer.
Experience working with AI accelerators or edge AI hardware.
Experience with GenAI, large language models, or vision transformers.
Experience with model optimization, ONNX, quantization, or inference runtimes.
Familiarity with Linux, Yocto, and embedded environments.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as a cpu workload analysis researcher within our company cloud's msca organization, you will be integral to developing silicon solutions powering our company's direct-to-consumer products. you will join a research and development team focused on analyzing and profiling workloads requirements within the company cloud environment. your role will involve conducting in-depth research on cpu optimization, feature development, and ml usages over compute platforms, contributing to identifying key areas of investment and future opportunities. this role offers a unique opportunity to perform groundbreaking research with a significant impact on both research methodologies and industry products, within the server chip architecture team. your work will directly influence the next generation of hardware experiences for millions of our company users and cloud customers.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity. our customers, our company cloud customers, and billions of our company users worldwide. we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
plan and execute detailed analysis of cpu workloads within the company cloud infrastructure, analyze trends and map future requirements.
collaborate closely with architecture and modeling owners to understand design specifications and identify critical scenarios related to cpu performance and efficiency.
develop and implement custom workload generation tools and methodologies to simulate real-world usage patterns on our company cloud platforms.
analyze the impact of Machine Learning applications on cpu usage, identifying opportunities for optimization and feature enhancements.
lead the investigation and development of metrics to measure cpu performance and efficiency, presenting findings to stakeholders and contributing to strategic decisions.
Requirements:
minimum qualifications:
phd in electrical and electronics engineering, or equivalent practical experience.
2 years of experience with software development in C ++ programming language.
1 years of experience with data structures or algorithms.
preferred qualifications:
experience in performance modeling, performance analysis, and workload characterization.
experience applying Machine Learning techniques and inference usage models on hardware.
expertise in cpu architecture disciplines such as branch prediction, prefetching, value prediction, and caching policies.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo
Job Type: Full Time
about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as part of our server chip design team, you will use your asic design experience to be part of a team that creates the SOC vlsi design cycle from start to finish. you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.in this role, you will contribute in all phases of application-specific integrated circuit (asic) designs from design specification to production. you will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SOC /rtl. you will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.the ml, systems, & cloud ai (msca) organization at our company designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our company services (search, youtube, etc.) and our company cloud. our end users, cloud customers and the billions of people who use our company services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our company clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
perform rtl development (e.g., coding and debug in verilog, systemverilog, vhdl), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power, and fpga/silicon bring-up.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.
Requirements:
minimum qualifications:
bachelor's degree in electrical engineering, computer engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking asics from specification to production.
8 years of experience in technical leadership.
experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
experience developing rtl for asic subsystems.
preferred qualifications:
experience working with design networking like: remote direct memory access (rdma) or packet processing and system design principles for low latency, high throughput, security, and reliability.
experience in tcp, ip, ethernet, pcie and dram including network on chip ( NOC ) principles and protocols (axi, ace, and chi).
experience architecting networking switches, end points, and hardware offloads.
understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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