דרושים » הנדסה » מהנדס /ת מחשוב

We are looking for a Senior CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are seeking a highly motivated, energetic, Software Engineer to support our Silicon Photonics Engineering group in Haifa, Israel.
Development occurs in a dynamic and challenging global multi-site environment. However, this is an individual contributor position reporting to the SiPh Engineering Manager in North Reading.
The ideal candidate will play a pivotal role in our dynamic team and will participate in developing complex test solutions for the emerging silicon photonic market at all stages of fabrication, from wafer probe to packaged test. This is a fantastic opportunity to contribute to innovative projects in the field of instrumentation
Utilize extensive C# experience to design, develop, and implement high-quality software instrumentation solutions
Collaborate with cross-functional teams to analyze requirements and deliver robust software applications
Develop scalable, high-performance, high-quality, extensible and maintainable software
Python knowledge is a plus, contributing to the versatility and adaptability of the development team

Do you want to impact billions of users by developing an extraordinary product with a prime focus on accuracy, understandability and performance of the product?
Bring passion and dedication to your job and there's no telling what you could accomplish.
PHY system engineers are responsible for pre/post-silicon system design activities to achieve full operation and optimization of all PHY aspects of a highly integrated complex wireless communication device.

In this role, you will be part of the team responsible for the PHY system design integration of a WiFi/BT/UWB IC solution. This includes, among other things:
Digital correction methods of RF impairments like Digital pre-distortion, IQ MM correction, Power Control, AGC, Modem control.
Optimizing PHY performance for a given system constraints.
Participate in modem design and implementation, from the architecture stage and floating point implementation all the way to RTL/FPGA validation in fixed point - Debug complex multi-disciplinary issues spanning from RF, PHY, MAC, HW and SW.
Connect with X-functional teams (RFIC, Algo, SW/FW etc.).
Perform hands-on PHY/RF lab work.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power Architect, you will not just design chips; you will define the energy efficiency of the infrastructure that powers our company services worldwide.
In this role, you will be at the intersection of architecture, logic design, physical implementation, and system software. You will own the power architecture for next-generation custom SoCs (System on Chips), making critical trade-offs between performance, thermal constraints, and power delivery to build the most efficient computing platforms on the planet.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define and own the SoC power architecture, including complex power domains, clocking structures, and Power Delivery Network (PDN) solutions to achieve optimal Performance-per-Watt.
Architect sophisticated power management policies, including Dynamic Voltage and Frequency Scaling (DVFS), power gating, and state strategies. Define the hardware/software interface for the Power Management Unit (PMU) and provide power management specifications.
Lead collaboration across architecture, RTL, physical design, packaging and validation teams to establish power budgets and specifications. Ensure power requirements are met from concept to tape-out.
Develop high-fidelity power and performance models to evaluate architectural features early in the design cycle. Drive pre-silicon power estimation and analysis to guide design decisions.
Lead post-silicon power analysis, correlating lab measurements with pre-silicon models to close the loop and improve future methodologies.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our companyrs, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define and implement solutions for complex design, integration and verification problems using in-house and external technical solutions or tools. Ensure chip quality by implementing best practices and implementing quality control measures.
Involve in project development and convergence with the highest quality, agreement with issues as they arise through design and implementation, or equivalent relevant experience.
Connect between RTL design, physical design, DFT, external IPs and SoC while maintaining project priorities.
Maintain project infrastructure and stability.

In this role you will be responsible to model, analysis and estimate power consumption of daily use cases on our next generation SoCs. Drive new ideas into micro-architecture, design and circuits to reduce SoC power across the dynamic range. Drive budgeting, measurement and analysis of overall SoC power for many use cases of interest. You Will work extensively with many teams across every stage of the project from Architectural definition through Design implementation and SW management to focus on power optimization.
To be successful in this role, you must have keen interest and motivativation to deliver best experience to our users, and wide perspective in order to work simultaneously on multiple disciplines. This role is required working closely with many cross-functional teams and good understanding of hardware and software interaction at system level.

In this highly visible role, you will be responsible for SOC power simulation and power modeling, SOC use case power analysis, and drive the future SOC power optimization.