דרושים » מדעים מדוייקים » Design Verification and Validation engineer

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are searching for an outstanding Director to lead Networking test equipment and HW. The candidate will be responsible for managing a team of HW engineers overseeing Networking test equipment and HW at our OSATs (Wafer Sort, Final test, Burn-in, SLT). This job allows you to work in a complex, exciting engineering environment handling Operational challenging high performance IC testing activities (Large devices, high frequencies, high power and optical).

What you'll be doing:

Manage all Networking test equipment, hardware, and suppliers for NPI & mass production.

Directly manage a team of engineers.

New equipment installation & acceptances, also improve existing equipment OEE.

Working closely with capacity planning team to make sure supply is always guaranteed.

Collaboration with our internal development, engineering, operational teams, and equipment vendors.

Budget control for all equipment, spare parts, HW and service.

Defining maintenance, routines, and monitoring processes and implementation.

Establish, train, and maintain a robust engineering infrastructure support process to enable high challenges solutions in IC test environment and NPI.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

At our company, well give you the opportunity to harness all thats within you by working in teams of diverse and high-performing employees, tackling some of the most important health industry challenges. With access to the latest tools, information and training, well help you in advancing your skills and career. Here, youll be supported in progressing whatever your ambitions.

The Principal Service Quality Engineer provides technical leadership and advanced expertise to ensure our capital equipment products meet the highest standards of quality, safety, and reliability. This role serves as a subject matter expert (SME) for service quality engineering within the laser portfolio, influencing service processes, product design for serviceability, and supporting field reliability improvements.
Key Responsibilities

Provide technical leadership and oversight for service quality throughout the product lifecycle from design and development through post-market support.
Partner with Service Development Engineering to ensure serviceability, maintainability, and reliability are incorporated into product design requirements.
Lead development and review of Service Risk Analyses, Service Plans, installation/maintenance validation activities, and field service documentation.
Ensure service controls and field procedures are compliant with global regulatory requirements (e.g., 21 CFR 820.170, ISO 13485, ISO 14971).
Represent Service Quality in cross-functional reviews, risk assessments, and change control activities impacting field service or customer use.
Drive root cause analysis and CAPA activities related to service issues, ensuring effective and timely closure.
Collaborate with divisional Quality and Post-Market Surveillance teams to ensure service-related data feeds into product reliability models and quality planning. Support trend analysis of field performance data to identify systemic issues, product reliability risks, and improvement opportunities.
Participate in internal and external audits as a Service Quality SME; provide audit readiness support to divisional teams.
Support process maturity initiatives by developing and refining tools, templates, and metrics used across the Service Quality function.
Build strong partnerships with R&D, Manufacturing, and Field Service organizations to influence design and serviceability outcomes.
Provide mentorship and technical guidance to Service Quality Engineers across Service Quality team.
Partner with Service Development Engineering leadership and Quality Management to ensure consistent support and prioritization of service projects across the portfolio.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Our Networking Software Group is rapidly growing, and we are hiring a Software Engineer for the InfiniBand Switch Software Development team. Come and join a diverse group of engineers spread across the globe who come together in small close knit teams to innovate and develop groundbreaking solutions.

As a member of the team, you will be a part of a cutting-edge Python-based SW project using advanced techniques to solve complex issues. You will gain unique knowledge of how operating systems work, Linux kernel and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge? The Networking Hardware Acceleration team develops a cutting-edge, high speed API for NVIDIAs Network Interface Cards (NICs). We power foundational projects like DPDK and DOCA-Flow, driving next-generation networking performance. Join us to gain deep insights into NVIDIAs hardware acceleration technology and make a meaningful impact on both software and hardware innovation.

What Youll Be Doing:
Learn new networking features, plan their verification strategy, and implement it on top of a Python-based in-house developed environment.
Design, develop, optimize, and maintain an OS/Kernel verification testing platform.
Collaborate with team members, architects, design, QA teams, and customers (both external and internal).
Innovate! We are always looking for new ways to make NVIDIA's Networking driver products shine in customers' eyes.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

our SAP department is seeking for an SAP CO QA Tester. We are looking for a skilled SAP CO QA Tester to lead testing processes, validate financial control workflows, and ensure high-quality delivery across global SAP CO environments. This role requires strong analytical capabilities, deep understanding of SAP CO/FI processes, and hands-on experience in writing and executing TEST scenarios. A full-time, hybrid position, based in North Israel.?Key Responsibilities:
* Execute end-to-end testing for SAP CO processes, including financial controls, workflows, and period closing.
* Analyze business requirements, identify gaps, and produce TEST documentation including TEST plans, TEST cases, and results.
* Collaborate with SAP CO consultants, ABAP developers, and global business teams to validate new developments, integrations, and system enhancements.
* Support integration testing between SAP and external systems such as BI and legacy platforms.

we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Responsibilities

Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.