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לפני 6 שעות
Location: Yokne`am
Job Type: Full Time
We are in the early stages of a new project and looking for a talented Senior engineer to take on a key role, leading Verification efforts of major parts of our ASIC - from scratch
Roles and responsibilities:
Take ownership of Verification for large ASIC clusters.
Plan, build, and execute the Verification environment end-to-end.
Mentor and guide juniors/students.
Requirements:
B.Sc. in Electrical Engineering or a related field.
6+ years of experience in ASIC/SoC Verification.
Experience leading verification planning and execution independently.
Preferred:
Familiarity with RDMA, Ethernet, DDR or RISC-V.
This position is open to all candidates.
 
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לפני 7 שעות
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilites:
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.
Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
8+ years experience in full chip design.
Experience in leading the full-chip level design and successfully taping out multiple intricate SoCs.
Experience in floor planning, integration, signoff methodologies, and signoff tools for hierarchical designs.
Experience with SoC design practices such as multiple voltage and clock domains, integration of mixed-signal IPs and I/O integration.
Expert knowledge of the entire backend design flow from RTL to TO.
Experience with STA (Static Timing Analysis) tools like primetime or tempus.
Experience with IR drop tools like Ansys Redhawk or Volta's.
Physical Verification Expert (DRC/LVS).
Strong independent and motivated to learn quickly, hard-working, and is results oriented.
Good social skills and ability to work collaboratively with other teams.
Preferred:
Experience with high-speed serial interfaces such as PCIe, DDR, Ethernet.
Familiarity with advanced DFT flows & tools.
Strong proficiency in scripting language, such as, Perl, Tcl, Python, Make, and automation methods/algorithms.
This position is open to all candidates.
 
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02/11/2025
Location: Yokne`am
Job Type: Full Time
Do you want to help accelerate the networking solution across our product portfolio? Our Co-packaged silicon-photonics group seeks a dedicated R&D system engineer to join our silicon-photonics testing platforms team. We seek a skilled and experienced systems engineer to join our team.

The ideal candidate will have experience in these topics: high-speed testing of fiber-optic modules for telecom/datacom, lasers, and post-silicon verification. In this role, you will lead the design, Integration, and deployment of electro-optical testing platforms for SiPh. You will work closely with the R&D teams, internal verification teams, architects, FW developers, market-leading subcontractors, and other stakeholders to design systems. This role requires hands-on experience and a deep system-level multidisciplinary understanding of high-speed transceivers, as well as excellent integration, problem-solving skills, and strong communication abilities.

What youll be doing:

You will lead the design of testing setups for bringing up and testing the new SiPh transceiver chips.

Provide technical support and assistance to manufacturers of silicon photonics testing platforms.

Troubleshoot and diagnose technical issues related to equipment, processes, and software.

Document experimental procedures, results, and findings accurately and comprehensively.

Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.
Requirements:
What we need to see:

BSc. Degree (MSc. an advantage) in Electrical Engineering, Physics, or related fields

5+ years of relevant experience in laser testing or in high-speed electro-optical testing

Proven experience working in an optics and laser laboratory, preferably in a research or development environment.

Strong problem-solving, debugging, and analysis with examples to prove it.

Knowledge in signal integrity and high-speed signal measurement of electro-optical high-speed interfaces.

Experience with establishing complex high-speed lab setups. Proficient in using electro-optical & electrical measurement tools such as oscilloscope, VNA, BERT & spectrum analyzers.

Basic understanding of PCB layout and high-speed board design issues.

Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.

Ways to stand out from the crowd:

Experience with high-speed transceivers verification/ validation

Post-silicon testing, debug, or FA

Knowledge of programming languages, such as MATLAB, Python, or LabVIEW, for data analysis and automation.

Strong knowledge of laser diode physics, fiber optic technology, and silicon photonics technology and devices.
This position is open to all candidates.
 
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לפני 6 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for Emulation & Prototyping Engineer.
Roles and responsibilities:
Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
Map RTL designs to FPGA/emulation platforms.
Develop test environments and infrastructure for HW/SW co-verification.
Support hardware bring-up and software validation on emulation platforms.
Collaborate with verification engineers to run regressions and accelerate debug cycles.
Optimize partitioning, synthesis, and runtime performance on emulation systems.
Work cross-functionally with RTL design, verification, and firmware/software teams.

Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering.
47 years of experience in FPGA prototyping or emulation of ASIC/SoC designs
Strong understanding of digital design and RTL (Verilog/SystemVerilog/VHDL).
Hands-on experience with at least one emulation/prototyping platform (Palladium, Protium, Veloce, ZeBu, or FPGA-based)
Good knowledge of synthesis, timing closure, and design partitioning for FPGA/emulation.
Familiarity with verification methodologies and environments (UVM/SystemVerilog/C).
Experience with scripting (TCL, Python, Perl, or Shell) for automation.
Strong problem-solving and debugging skills.
Ability to work in a fast-paced, collaborative environment.
Excellent communication and teamwork skills.
Preferred:
Exposure to software bring-up, driver validation, or firmware testing on emulation.
Knowledge of bus protocols (Ethernet, DDR, etc.).
Experience with debug tools (waveform viewers, logic analyzers, or emulation debug frameworks).
Background in SoC architecture and hardware/software co-design.
This position is open to all candidates.
 
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לפני 6 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities:
Join a team of VLSI frontend design engineers in projects.
Define, plan and implement our next chip in on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.
Requirements:
BSc or MSc in Electrical Engineering or Computer Engineering
8+ years of VLSI experience.
Experience with multi clock domain, multi power domain designs (UPF).
Methodologic approach.
Strong Motivated to learn quickly, hard-working, and is results-oriented.
Great interpersonal relations skills.
Preferred:
Networking design experience Major Advantage
Backend experience: STA tools, formal equivalence tools, frontend/backend handoff methodologies.
SoC design/Integration experience.
Proven Methodologies and Environmental Building Experience.
Strong proficiency in scripting language, such as, Perl, Tcl, Python, Make, and automation methods/algorithms.
This position is open to all candidates.
 
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13/10/2025
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for a Network/Storage Test Engineer to join our End-to-End Cloud solution team. You are going to be part of the E2E Verification team with the main goal of testing and be part of defining the most sophisticated Ethernet/InfiniBand NIC and Switch features and topologies, which build fast enablement for the products to meet growing market demands. The ideal candidate will engage in testing and defining of Networking industry-leading systems and will bring with him an ability of the fast learning of new features, technologies, and protocol.

What you'll be doing:

Contribute to design review and product features requirements under the whole Ethernet/InfiniBand NIC & Switch portfolio and AI network.

Design and build setup topologies for appropriate product coverage with an emphasis on an emulation of customer large scale / complex environments.

Design, mentorship for testing automation team, and implement tests for the new features, as part of our growing network switch and adaptors division.

Lead innovation approach by prepare and deploy different POC activities, based on the growing field demands.

Generate comprehensive test reports during release execution procedure, assist with reproduction and debugs complex customer use cases, with determination of the issue root cause, be an engineering PIC for the full verification cycles of the customer use cases fixes provided by R&D team.

Execute end-to-end test scenarios in different scopes: Regression, Performance, Functional and Scale; Report the progress of testing and provide summary reports of testing activity.
Requirements:
What we need to see:

B.A./B.Sc. in Computer Science or Electrical Engineering or equivalent experience as IT/Network Engineer.

5+ years of practical experience.

Experience in Congestion Control/DCQCN, Switches and knowledges about collective communication: NCCL, MPI etc.

Very Strong Hands-on experience in Linux based platform.

Experience with L2 & L3 network protocols.

Fast and self-learner with outstanding technical skills.

Independent, responsible worker, able to plan and complete.

Effective trouble shooting and problem-solving skills.

Standout colleague with good communication and interpersonal skills.

Ways to stand out from the crowd:

Experience with virtualization technologies (KVM, HyperV, VMWARE, OpenStack, Kubernetes).

Background with NAS and/or SAN storage systems.

Scripting skills and experience: Bash / Python.
This position is open to all candidates.
 
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29/10/2025
Location: Yokne`am
Job Type: Full Time
We are looking for a System/Network Test Engineer to join our End-to-End Cloud solution team. You are going to be part of the E2E Verification team with the main goal of testing and be part of defining the most sophisticated Ethernet/InfiniBand NIC and Switch features and topologies, which build fast enablement for the products to meet growing market demands. The ideal candidate will engage in testing and defining of Networking industry-leading systems and will bring with him an ability of the fast learning of new features, technologies, and protocols.

What you'll be doing:

Contribute to design review and product features requirements under the whole Ethernet/InfiniBand NIC & Switch portfolio and AI network.

Design and build setup topologies for appropriate product coverage with an emphasis on an emulation of customer large scale / complex environments.

Design requirements, for testing automation team, and implement tests for the new features, as part of our growing network switch and adaptors division.

Lead innovation approach by prepare and deploy different POC activities, based on the growing field demands.

Generate comprehensive test reports during release execution procedure, assist with reproduction and debugs complex customer use cases, with determination of the issue root cause, be an engineering PIC for the full verification cycles of the customer use cases fixes provided by R&D team.

Execute end-to-end test scenarios in different scopes: Regression, Performance, Functional and Scale; Report the progress of testing and provide summary reports of testing activity.
Requirements:
What we need to see:

B.A./B.Sc. in Computer Science or Electrical Engineering or equivalent experience as IT/Network Engineer.

2+ years of practical experience.

Strong Hands-on experience in Linux based platform.

Experience with L2 & L3 network protocols.

Fast and self-learner with outstanding technical skills.

Independent, responsible worker, able to plan and complete.

Effective trouble shooting and problem-solving skills.

Standout colleague with good communication and interpersonal skills.

Ways to stand out from the crowd:

Experience with virtualization technologies (KVM, HyperV, VMWARE, OpenStack, Kubernetes).

Experience in Congestion Control/DCQCN, Switches and knowledges about collective communication: NCCL, MPI etc.

Scripting skills and experience: Bash / Python.
This position is open to all candidates.
 
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09/10/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team at NVIDIA, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
1+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.

Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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לפני 6 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for a Physical Design Engineer.
Roles and Responsibilities:
Build, maintain, and optimize CAD tools infrastructure supporting both commercial and in-house layout and verification tools (Cadence Virtuoso, Synopsys ICC, Mentor Calibre, etc.).
Develop and automate IC layout flows, including placement, routing, floorplanning, PCells, and tapeout preparation.
Apply advanced software engineering and CAD methodologies to address technical challenges, evaluate architectural and hardware constraints, and deliver scalable automation solutions.
Collaborate with layout, circuit, and verification teams to capture requirements and deploy efficient automation workflows.
Design and implement testing frameworks, regression suites, code review practices and CI/CD pipelines to validate CAD flows, ensure correctness, and improve reliability.
Define, document, and enforce best practices, standards, and procedures; provide technical guidance, training, and support to engineering teams.
Requirements:
B.Sc. in Electrical/Computer Engineering, Computer Science, or Practical Engineering (hands-on IC layout/CAD experience also considered).
13 years of relevant industry experience or 3+ years for more senior candidates both junior and experienced engineers will be considered.
Hands on experience with layout and verification tools, including both commercial (Cadence, Synopsys, Mentor) and in-house CAD solutions.
Strong programming skills in SKILL, Python, TCL, Perl, and Shell (Csh, Bash).
Ability to debug, optimize, and troubleshoot CAD flows and layout workflows.
Familiarity with regression testing, code review, flow validation, and CI/CD practices in CAD/EDA environments.
Strong communication and teamwork skills, with the ability to work independently in a dynamic, fast-paced environment.
Preferred:
Prior experience as a Layout Engineer or EDA/CAD Physical Design Engineer in a semiconductor environment.
Deep understanding of IC physical design and verification flows:
Custom analog/digital layout, floorplanning, placement, routing
DRC, LVS, ERC, parasitic extraction
Physical verification and tapeout readiness
Advanced SKILL programming for layout automation and productivity.
Experience with tapeout preparation, design rule integration, and physical verification.
Knowledge of PCells, parameterized devices, and layout generators.
Proficiency in physical verification runset programming and maintenance, including customization of DRC/LVS/ERC decks and integration into design flows.
Experience building automated regression environments for CAD/EDA flows in SKILL.
Experience with in-house CAD tool development and with the integration and customization of both in-house and commercial solutions.
This position is open to all candidates.
 
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6 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.

Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.

Engage in cutting-edge PCIe generation working on latest PCIe gen7.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.

5+ years of experience in Verification.

High Level of English.

High motivation to grow and excel.

Ways to stand out from the crowd:

Knowledge in PCI Express standard.

Validated experience in Verification or RTL Frontend ASIC Design (Chip Design).

Background in Specman/ UVM.

Background in RTL uArch & coding.
This position is open to all candidates.
 
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29/10/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Chip Design Verification and Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Take a crucial part in developing our next-generation chip controller

Design and verification with challenging multi-discipline context

Take part in the development of all our networking and GPU networking chips and systems.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering with high scores, or equivalent experience.

2+ years of validated experience in ASIC Verification and/or RTL (Chip Design).

High Level of English.

A team player with good communication and interpersonal skills.


​Ways to stand out from the crowd:

Background in Specman.

Knowledge in HDL (Verilog/VHDL).

Experience in Mixed Signals, Analog, and Behavioral Models for Verification.
This position is open to all candidates.
 
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