דרושים » הנדסה » Integration Team Lead

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to foster creativity and commitment. The hardware team is responsible for all hardware within QM spanning from room-temperature control hardware to our cryogenic QPU carriers.
We are seeking a Digital Electrical Design Engineer with extensive experience in high-speed interfaces and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D teamguiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites.
Key Responsibilities:
FPGA coding Low-Level HW Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
Board Design Experience: Own the entire hardware lifecyclefrom concept and schematic design in Altium to layout review, testing, and production release.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardwarefirmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.

Were looking for a talented Post Silicon Lead to join our IC group.

Responsibilities:
Lead and manage the post-silicon activities for our mixed-signal and RFIC chipset (with emphasis on mixed-signal).
Take part in the definition and productization of radar chips.
Support and validation of bring-up activities (first bring-up, characterization, reliability, testability) for mixed-signal and RFICs.
Drive chip testing infrastructure including tools, equipment, and test code.
Work closely with the manufacturing and OSAT test teams.
Collaborate with other R&D teams from the architecture phase through production.

Were looking for a talented Radar System Integration Engineer to join our innovative System Engineering group.

Responsibilities:
Integrate multidisciplinary full radar system including HW Platform, ASIC, RFIC, SW, ALGO.
Troubleshoot and debug our Radar, ASIC and FPGA platforms.
Define, implement and execute acceptance tests plans, procedures, and reports.
Define new features and HW requirements for full system optimization.
Simulate and analyze mix signals system data.
Validate system performance.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our server chip design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Technical Leadership and mentor team members.
Communicate and work with multi-disciplined and multi-site teams.

As a Data Center Commissioning Engineer (CxE), you will be part of highly creative, efficient team tasked with tackling fascinating and challenging problems building and supporting the operations of AWS owned data centres, Hybrid Colo's, Single Tennent Colo and Multi Tennent Colo builds . The AWS Commissioning team (ACx) understands, evaluates, defines and manages the expectations of construction quality in accordance to engineering designs to meet the customer requirements.

Key job responsibilities:
You will be responsible for supporting vendors, contractors and other teams involved in the construction and commissioning of various systems such as:

-Medium and low voltage power systems.
-Generators.
-UPS.
-HVAC.
-Chilled Water Systems.
-Building Management systems (BMS).
-Electrical Power Monitoring Systems (EPMS).
-Testing and balancing.
-Pumps and Hydronic systems.

The CxE shall provide multi-discipline input into the scheduling, test script development, designing, and planning of projects. In addition, the CxE will be required to review component submittal packages, lead Factory Witness Testing (FWT), perform system level and integrated system testing. During commissioning, the CxE will continuously audit activities to ensure compliance with environmental, quality, and safety requirements. Additionally, the individual will be responsible for comprehensive weekly reporting of status of all ongoing projects and lessons learned to continually improve the quality of our program. This position will include coverage of multiple inflight projects.

we are a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of QM lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers. Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
The hardware development team spans two global sites one in Tel Aviv and one in Copenhagen. The two teams work seamlessly together across projects, and we try to foster an open dialogue to enhance creativity and commitment. The hardware team is responsible for all hardware within QM, spanning from room-temperature control hardware to our cryogenic QPU carriers.
About the Role
Were looking for a Hardware Qualification Engineer to join our Hardware R&D team in Tel Aviv. In this role, you'll ensure our hardware systems perform reliably under real-world conditions. Youll work closely with our system, software, and validation teams to design and execute comprehensive qualification test plans and legal qualification requirements. Your insights will directly impact the quality, robustness, and performance of cutting-edge quantum control systems.
Key Responsibilities
Define and implement system-level hardware qualification procedures based on in-depth analysis of circuit and system designs.
Design and build complex test setups, integrating our hardware with advanced measurement tools.
Run and analyze qualification testsstress, thermal, performance, and edge cases.
Review test data to identify anomalies and assess hardware readiness.
Collaborate with engineering teams to communicate findings and support root-cause investigations.
Maintain clear, detailed documentation of test methods, configurations, and results.
Work with vendor laboratories to certify our systems to CE, FCC and other international requirements.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the DFT Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

we are a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc.). The company offers an award-winning disruptive solution; a sensor free approach to smart infrastructure. The company is VC backed and in the revenues stage.
Combining pioneering technology in optical fiber sensing with state-of-the-art machine learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
The Chief Scientist at our company is the companys top expert on physics, fiber sensing, and scientific innovation. This role shapes our companys core technologyfrom hardware and sensing architecture to research leadership and IP strategy. It combines deep technical expertise in DAS with hands-on leadership across science, engineering, and innovation.
The Physics Team Leader will report to the VP R&D.
What Youll Do:
Own and lead the development of our next-generation fiber-sensing systems, driving innovation from concept through production.
Manage and grow a multidisciplinary team of physicists, providing technical mentorship and day-to-day leadership.
Oversee cross-functional hardware development, including: optical system design and
integration, electrical board design, thermal design of enclosures and components.
Serve as our companys subject matter expert in fiber sensing in general and DAS in particular and in geophysics and seismology.
Lead scientific research and collaboration, including academic partnerships and publications in those fields.
Lead our companys IP and patent strategy and build its IP Portfolio, including drafting and managing patent applications.
Lead system-level architecture decisions, integrating optical, mechanical, electrical, and computational elements to deliver reliable, high-performance systems.
Collaborate closely with algorithm, software, and field engineering teams to ensure smooth integration and deployment of hardware in real-world environments.

We are seeking a System Validation & Quality Assurance Manager to define validation methodologies, set quality standards, and drive a culture of quality across multidisciplinary hardware and software systems. This leadership role emphasizes process ownership, methodology enforcement, and coaching teams, while also providing technical guidance and hands-on validation expertise.

Responsibilities:
Define and enforce validation methodologies, processes, and quality standards across firmware and embedded software.
Lead validation planning and execution reviews, ensuring coverage, consistency, and defect prevention.
Establish automation and CI/CD validation strategies and guide adoption across teams.
Mentor and coach engineers to embed quality practices and foster continuous improvement.
Provide technical leadership in system-level validation, including algorithms and machine learning within firmware and embedded software environments.
Oversee validation execution on ATE platforms, ensuring correlation between simulation, emulation, and silicon test results.
Accountable for high-level analysis of production issues, driving defect escape reviews, enhancing test coverage, and defining quality gates to enforce continuous improvement.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company System Infrastructure builds the cloud for our company services and for our company Cloud customers, by solving business test of performance, cost, and scale, utilizing hardware, software, and system solutions.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan and strategy with stakeholders, including sign-off and exit criteria.
Plan and execute the verification of Internet Protocols (IPs) using dynamic verification and formal verification.