As a Senior Embedded Firmware Engineer, you will be the technical lead responsible for defining, implementing, and optimizing the embedded firmware that drives our ASIC. You will work closely with ASIC architects, hardware design teams, and software engineers to ensure a seamless and high-performance integration between silicon and system software.
Roles and responsibilities:
Own the HW/SW interface design for our Fully Homomorphic Encryption (FHE) ASIC, including low-level driver architecture.
Develop firmware from scratch, including boot code, device drivers, and control logic.
Collaborate with hardware and ASIC teams to define register maps, control protocols, and data paths.
Perform bring-up, debugging, and validation on prototype boards and silicon samples.
Optimize firmware for performance, reliability, and power efficiency.
Write technical documentation for firmware architecture, APIs, and hardware interface specifications.
Mentor junior engineers and contribute to best practices in embedded development.
Requirements: Requirements:
B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or related field.
7+ years of embedded firmware development for complex hardware systems.
Proven experience working in ASIC companies or on ASIC-related projects (bring-up, validation, firmware for custom silicon).
Strong C/C++ programming skills with experience in low-level, performance-critical code.
Solid understanding of SoC architecture, memory-mapped I/O, interrupts, and DMA.
Hands-on experience with embedded Linux, including Yocto or Buildroot build systems.
Hands-on Layer-2 Ethernet experience, including MAC/PHY bring-up, VLAN handling, and low-level packet processing.
Proven track record of hardware bring-up and debugging at the register level.
Excellent problem-solving skills and ability to work cross-functionally with hardware and software teams.
Preferred:
Low-level firmware development for RISC-V or ARM, including boot code, interrupt handling, and peripheral drivers
Knowledge of RDMA, InfiniBand, or RoCE protocols.
Background in cryptography, security hardware, or FHE concepts.
Exposure to ASIC or FPGA verification environments.
This position is open to all candidates.