דרושים » חומרה » Verification engineer

We are now looking for a Formal Verification Manager to join our company Networking team!
As a Formal Verification Manager in our companys Networking Business Unit, you will lead a team of highly skilled formal engineers responsible for verifying the next generation of our companys cutting-edge Network products and GPU technologies.
This is a unique opportunity to make a real impact at the heart of our companys AI and HPC revolution, while working in a fast-paced, innovative environment.
You will be part of a passionate and experienced team using leading formal verification tools and methodologies to ensure design correctness at the highest level. Your work will influence key architectural decisions and help deliver world-class silicon solutions for data centers, high-performance computing, networking, and storage applications.
What Youll Be Doing:
Lead and grow a team of formal verification engineers focused on pre-silicon Formal verification of complex digital designs.
Define and drive formal verification strategies and methodologies to prove the correctness of designs across multiple projects.
Collaborate closely with Architecture, Design, DV teams to identify verification needs and drive closure.
Provide technical guidance, mentoring, and support to engineers in the team.
Own the planning and execution of formal verification deliverables to ensure high quality and timely tapeouts.

we are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.
we are looking for a phenomenal Senior Verification Engineer for HW Simulation for the ChipSim Group. You will join the ChipSim growing team and take our product to next level, working closely with HW design and architect teams and gaining a deep understanding of our companys products and technologies.
What Youll Be Doing:
Develop and maintain robust test environments, verification flows, and infrastructure.
Define and execute comprehensive test plans for existing and next-generation networking features.
Take ownership of functional, integration, and regression testingfrom planning through execution.
Build automated test suites and integrate them into CI pipelines to ensure quality at scale.
Collaborate across architecture, firmware, and HW teams to drive quality and early bug detection.
Analyze complex system behaviors and drive debugging efforts across hardware and software boundaries.

we are looking for a Senior Firmware Verification Engineer to define, develop and maintain verification for our Ethernet switches. This role offers you an excellent opportunity to participate in the development process of our company switches and gain a deep understanding in hardware, firmware and software systems in a rapidly growing field.
What youll be doing:
Closely work with SDK/FW R&D Architecture and QA to define, write and implement test plan for out product existing new features.
Be responsible for verification and delivering different Networking features.
Define, develop and maintain verification procedure and reference model infrastructure - make test suites robust.
Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full life-cycle of verification which can range from verification planning, test execution or collecting and closing coverage.

The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are now looking for a Chip Design Verification Engineer. we are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.
What you'll be doing:
Develop shared verification code and solutions to be widely used by the chip design team.
Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.
Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.
Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
Collaborate with designers, verification specialists to accomplish your tasks.
Develop training sessions.

We are looking for a talented, fast learner, and highly motivated Chip Design Verification Engineer. As a member of our Chip Design Team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, Verification environment coding and logic debug. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:
Understand and analyze uArch definitions.
Implement verification components to verify RTL meets specifications.
Collaborate with our RTL, Arch and uArch teams.
Work on logic related to switch design.

we are hiring a senior, hands-on engineer to lead technical innovation in our Design Verification (DV) automation infrastructure. This role requires a strong design/verification background combined with a proactive approach identifying inefficiencies, proposing creative solutions, and implementing them with high ownership and impact. You will directly influence how verification is performed across our companys next-generation Networking chips, enabling more scalable, efficient, and robust flows for complex ASICs powering the AI revolution.
What you'll be doing:
Lead the development of advanced verification automation tools, regression flows, and debug infrastructure.
Identify key challenges and inefficiencies in current DV methodologies and proactively propose and implement improvements.
Work closely with DV engineers, design teams, and tool developers to ensure solutions are practical and impactful.
Balance innovation with hands-on engagement in daily DV issues keeping a strong connection to real-world challenges and support needs.
Act as a technical leader within the team, driving discussions, mentoring peers, and crafting strategic directions for DV automation.