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we are seeking a senior leader to establish and grow its Databricks practice. This is a unique opportunity to build and lead a strategic Data & AI capability within a leading consulting firm, shaping its vision, offerings, team, and market presence.
The role combines business leadership, solution architecture, and client engagement, helping organizations leverage modern Data & AI platforms to drive transformation and innovation.
Job description
Lead and expand EY's Databricks practice, including strategy, capability development, team growth, and go-to-market initiatives.
Design and oversee enterprise-scale Data & AI solutions, including Lakehouse architectures, data modernization programs, and AI-driven platforms.
Build trusted relationships with senior stakeholders, lead business development efforts, and drive complex technology engagements.
Lead the successful delivery of large-scale Data & AI projects while mentoring and developing high-performing teams.

We're looking for a Senior Full Stack Engineer (Frontend Oriented) to join our growing team.
Responsibilities
Design & Build modern, scalable frontend applications with React and TypeScript, delivering seamless user experiences for developers.
Develop & Maintain the design system closely with Product and UX, ensuring consistency, usability, and alignment with user needs.
Manage State at Scale using frameworks such as Redux, React Context, or React Query to support high-performance, complex applications.
Contribute Across the Stack with hands-on coding in Python and work on AWS cloud infrastructure where needed.
Collaborate closely with product, security, and backend teams to translate requirements into elegant and performant technical solutions.
Own Delivery end-to-end: architecture, implementation, automated testing, CI/CD, and production monitoring.
Champion Best Practices around code quality, documentation, accessibility, observability, and security-by-design.
Mentor & Guide teammates, sharing knowledge on modern frontend patterns and cloud-native development.

As a Senior or Principal Software Engineer in Cortex Cloud, you will contribute to the development and scaling of cloud-native security solutions for enterprise organizations. This role involves working within an established team to evolve a high-traffic product, with a focus on refining architecture, optimizing the technology stack, and maintaining engineering standards.
Your responsibilities include writing reliable code, influencing product direction, and designing distributed systems. You will be expected to make technical decisions that impact the long-term stability and performance of cloud workload protection services.
AI Integration & Engineering Workflow
A core component of our development process is the use of AI. Rather than basic code completion, we integrate AI assistants as functional components of our workflow. Our team utilizes a multi-agent AI system (IDEX/ProDex) that assists across the development lifecycle: from planning and architecture to code analysis and security reviews.
In this role, you will:
Work with AI Tools:Utilize platforms such asGemini, Claude, and Cursorfor tasks beyond code generation, including root-cause analysis, system design reviews, and architectural assessment.
Develop AI-Augmented Workflows:Help refine how AI is integrated into the SDLC, including the orchestration of agents and the development of internal tools that extend AI capabilities across our codebase.
Maintain Quality Standards:While AI assists in increasing velocity, you are responsible for the technical output. This includes critical review of all generated code and ensuring that AI-assisted work aligns with our architectural requirements and security benchmarks.
Interact with Specialized Agents:Coordinate with AI agents (Product, Architecture, Security) that operate on shared context to assist in managing complex engineering tasks.
We are looking for engineers who are interested in leveraging AI as a technical tool to manage complexity and who want to contribute to the practical application of human-AI collaboration in a cloud environment.

We are looking for an outstanding Senior Networking Software Architect to join the NIC/DPU Software and Firmware Architecture group. In this role, you will help define the next generation of our datacenter and AI networking platforms, with focus on DPU management, QoS, performance, telemetry, and software architecture across stacks. You will work closely with hardware designers, firmware/kernel driver teams, system engineers, validation, product management and customers. The role spans early architecture definition, pre-silicon design, bring-up, and production readiness for large-scale AI and cloud datacenter deployments.

What Youll Be Doing:

Own software and system architecture for next-generation DPU management, QoS, performance, telemetry, and observability features.

Define end-to-end control and management flows across DOCA, host drivers, embedded firmware, BMC, management controllers and external management systems.

Specify telemetry and observability requirements, including counters, logs, traces, events, health monitoring, debug data, and streaming telemetry.

Define management interfaces and APIs for configuration, provisioning, lifecycle operations, diagnostics, and field serviceability.

Write clear architecture specifications, interface definitions, flow diagrams, and design documents for software, firmware, and system teams.

Partner with R&D teams to translate high-level architecture into implementable designs and guide features through development, validation, silicon bring-up, and production.

Analyze system performance bottlenecks, interoperability issues, telemetry gaps, and customer-reported issues, then feed learnings into future architecture.

Collaborate with system and cluster architects to ensure NIC/DPU features fit end-to-end AI datacenter and cloud networking designs.

Were looking for a Senior Backend Engineer to join our growing team.
Responsibilities:
Design and build scalable backend services and APIs that power our open security platform.
Develop serverless architectures on AWS, focusing on reliability, performance, and scalability.
Collaborate closely with product and security teams to translate requirements into clean, effective technical solutions.
Own delivery end-to-end: architecture, implementation, automated testing, CI/CD, and production monitoring.
Champion best practices around code quality, documentation, observability, and security-by-design.
Contribute to technical discussions and share knowledge with teammates on backend architecture, cloud infrastructure, and development best practices.

Your Career:
We are seeking a high-impact Sr. Staff Software Engineer to drive technical strategy, execution, and delivery within our Data & AI Platform team. In this role, you will architect cloud-native infrastructure, establish R&D best practices, and consistently ship high-ROI platform services that power core solutions for both internal systems and enterprise clients.
Your Impact:
Technical Leadership & Delivery: Define R&D engineering standards and architecture principles while taking full ownership of end-to-end delivery for complex, production-ready initiatives.
Cloud & Data Architecture: Architect and build scalable, highly available solutions across major cloud environments (AWS, GCP, or Azure) leveraging modern data, streaming, serverless, and storage platforms.
AI-Driven Engineering: Integrate modern AI tools and autonomous agents into daily workflows to optimize development velocity, author reusable agent skills, and maintain contextual grounding for maximum efficiency.
End-to-End Ownership: Lead all phases of an AI-augmented Software Development Life Cycle (ASDLC)-from architectural design through automated testing, CI/CD deployment, and operations.
Cross-Functional Collaboration: Partner with product leaders and technical stakeholders to translate complex business needs into clear, high-value software deliverables shipped on schedule.
Mentorship & Culture: Elevate engineering standards across the org through architectural guidance, code reviews, and continuous knowledge sharing.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of challenging designs (including high cell count and HS blocks). Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part inflows development.

We are seeking a highly skilled and versatile Performance Research and Analysis Manager to join our Performance Group. This role will drive end-to-end performance strategy and execution for next-generation our data centers and solutions based on GPU systems, NIC, Switch, DPU and Networking technologies. The ideal candidate will oversee, evaluating, and optimizing end-to-end AI GPU cluster-level performance for scaling out large scale distributed training and inference jobs communication. The role will focus heavily on RDMA, Networking Protocols, Collective Communication, Congestion Control, and Load Balancing algorithms. Secondarily, you will lead our DPUs and Storage technologies for N-S use cases to support AI Inference jobs. Third, you will drive our Performance Dashboards and Observability for cluster-level performance analysis from a stream line telemetry across NICs, Switches, GPUs, and NVlink.

What you'll be doing:

Drive end-to-end performance strategy, characterization, test plans, and optimization for next-generation our AI GPU clusters, focusing on large-scale distributed training and inference workloads.

Deeply evaluate and optimize our Networking core technologies performance, including RDMA/PRDMA, networking protocols, collective communication (NCCL), congestion control, and load-balancing algorithms.

Work on performance research and analysis of NVIDIA DPUs and storage technologies in North-South (N-S) use cases and deployment scenarios to maximize performance and efficiency for AI inference jobs.

Drive the strategy for performance observability and dashboards across next-generation NVIDIA data center solutions and supercomputers by leveraging scalable, streamlined telemetry pipelines to build performance dashboards and automated analytics based on real-time performance metrics across NICs, Switches, GPUs, and NVLink boundaries.

Perform deep root-cause analysis (RCA) on complex multi-node performance bottlenecks, driving actionable mitigation plans across hardware, firmware, and software teams.

We are seeking a Senior System Management Architect to lead the management architecture for our advanced SmartNIC cards. You will be the resident expert for SmartNIC system management, ensuring that NIC ASICs, Baseboard Management Controllers (BMCs), MCUs, CPUs, and CPLDs operate in perfect unison. You will own the lifecycle management specifications for SmartNIC platforms-from factory provisioning and day-one deployment to complex orchestrated reset flows and secure recovery. If you are someone who enjoys looking at a high-level system diagram and then immediately diving into the I2C/I3C bus topologies and PLDM command structures required to make it work, this role is for you.

What you'll be doing:

System Architecture & Flow Definition: Define and document comprehensive production, provisioning, update, recovery and reset flows for SmartNIC cards. Crucially, you will ensure that these board-level architectural decisions perfectly align with and support overarching platform-level needs, orchestrating seamless coordination between the NIC ASIC, BMC, CPU, and peripheral components.

Security & Provisioning: Specify security provisioning flows including OTP fusing, secure boot enablement, attestation key injection, certificate chain management, RPMC key derivation, and PQC (Post-Quantum Cryptography) requirements. Define IPN-to-OPN transition and component locking procedures.

Protocol Implementation & Guidance: Specify the use of standard management protocols (MCTP, PLDM, SPDM, NC-SI) across internal board interfaces to achieve secure boot, firmware updates, and telemetry gathering.

Hardware/Software Intersect: Dive deep into device-level hardware and software behaviour. Define CPLD logic requirements, power-sequencing dependencies, and reset orchestration (e.g., handling PCIe PERST#, SBR, and forced resets) for multi-host and standalone SmartNIC environments.

Interface Management: Architect intra-board communication pathways using PCIe, I2C/I3C, USB, and SPI, ensuring robust out-of-band (OOB) and in-band management connectivity.

Cross-Functional Leadership: Collaborate tightly with Production teams, Hardware and Firmware Engineering, NIC FW/Driver teams, and QA to translate your architectural specifications into implementable, testable realities.

Technical Documentation: Author rigorous technical specifications, test plans, and architectural design documents to guide both development and factory production.

our company helps leading organizations navigate digital transformation, cloud adoption, and emerging technologies. We are looking for a Junior Technology Consultant to join our team. This role offers a unique opportunity to work closely with senior architects and technology leaders, gaining exposure to enterprise-scale technology and cloud initiatives.
Job description:
Support technology consulting and architecture projects across various industries.
Participate in client meetings to gather business and technical requirements.
Assist in solution design, architecture documentation, and technology assessments.
Research emerging technologies and cloud-based solutions.
Collaborate with client IT, development, infrastructure, and security teams.
Contribute to projects involving cloud platforms, APIs, integrations, and enterprise technologies.

Join us, the industry leader in high-speed communication devices, as a Physical Design Engineer in our Networking Silicon engineering team. You will develop innovative chips with outstanding efficiency and minimal latency. This opportunity lets you be part of a team leading modern technology, where your contributions will have a meaningful impact in a dynamic and inventive environment. We value collaboration, inclusion, and excellence, ensuring our technology remains world-class and our team members are supported to succeed.

What you'll be doing:

Engaging in the physical build of blocks according to specifications under challenging constraints, targeting efficient power, area, and performance.

Working on a variety of exciting builds, resolving complex timing and congestion issues with precision.

Engaging in all facets of physical chip build development (RTL2GDS), including synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Contributing to flow development to improve and innovate our processes.

Collaborating with a team of outstanding engineers to achieve flawless integration and implementation of builds.

Our Networking Product Engineering is looking for a Development Quality Manager to join the NPE management team and lead quality methodology across a broad engineering organization.

In this role, you will define and drive the quality operating model across product development, design, validation, NPI, manufacturing transfer, and field-learning interfaces. You will work across teams that develop products as well as internal engineering deliverables such as test boards, testers, and validation infrastructure, ensuring that quality is designed in from concept through production and beyond.

This is a high-impact leadership role for someone who can combine engineering depth, structured quality methods, and strong cross-functional influence.

What youll be doing:
Lead quality activities throughout the product lifecycle, from concept through NPI and manufacturing transfer.
Define and improve development quality processes and frameworks across design, engineering, test, and V&V.
Participate in design reviews, providing quality input and milestone-readiness guidance.
Lead risk management activities, including FMEA and preventive quality methods.
Drive root-cause investigations and ensure effective CAPA implementation and closure.
Define, monitor, and report quality KPIs to NPE leadership.
Collaborate with R&D, reliability, manufacturing, supply chain, and operations partners.
Support audits and ensure compliance with internal and external requirements.
Serve as the primary NPE interface to Hardware and Operations Quality teams, driving organizational learning and governance across test assets.