לוח משרות דרושים הייטק תוכנה בצפון

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Lead the end-to-end execution, tracking, and convergence of chip-level CDC and RDC for complex SoCs across all IPs and partitions.

Plan and orchestrate CDC/RDC signoff: define methodology, scopes, run plans, constraints, and acceptance criteria.

Run and maintain CDC/RDC flows and rule decks, including multi-mode, multi-clock, and hierarchical signoff.

Triage violations efficiently: root-cause to RTL, constraints, tool setup, or IP models; prioritize and drive fixes to closure with owners.

Verify reset architecture and RDC robustness (reset domain intent, release sequencing, glitch detection, fanout).

Author and review CDC/RDC constraints, waivers, and justifications; ensure auditability and signoff quality.

Automate runs, report parsing, dashboards, and KPIs for closure tracking using scripting and data tooling.

Partner with RTL, DV, DFT, STA, PD, and Architecture to align fixes, manage ECOs, and protect CDC/RDC quality during late design changes.

Define and enforce signoff gates; communicate progress and risks with clear metrics and issue tracking.

Continually improve methodology and training to prevent recurring CDC/RDC issues and accelerate convergence.

We are searching for a forward-thinking Software Engineer to join our VLSI Design Automation Infrastructure team. We are looking for a candidate who looks beyond traditional scripting and is eager to leverage Artificial Intelligence and Machine Learning to revolutionize how we build chips.

In this role, you will manage high-performance compute and storage environments while pioneering the integration of AI-driven tools into our workflows. You wont just maintain the infrastructure; you will modernize it-using LLMs to optimize code, ML to predict compute bottlenecks, and intelligent automation to streamline the backend networking team's success.

What youll be doing:

AI-Driven Optimization: Leverage AI/ML methodologies to analyze compute and storage patterns, predicting resource needs and optimizing LSF grid performance.

Next-Gen Tooling: Design and develop intelligent scripts and automation tools, integrating Generative AI (LLMs) to accelerate debugging and workflow generation.

Infrastructure Management: oversee complex On-Prem environments (LSF) and storage solutions, ensuring maximum uptime for critical VLSI projects.

Data Visualization: Build dynamic, data-driven dashboards that not only report status but utilize analytics to provide actionable insights on infrastructure health.

We are looking for an excellent software first-level manager to join the NSV (Network Solutions Validation) group. In this role, you will lead major development efforts of high-performing software automation systems for NVIDIA's Data Center environments-driving data growth for some of the worlds largest companies. Youll work in a dynamic, fast-paced environment alongside dedicated engineers worldwide. Are you ready for the challenge?

What You'll Be Doing:

Lead and mentor a team of engineers, fostering a culture of collaboration, innovation, and continuous improvement.

Champion Agile methodologies and Scrum guidelines, facilitating sprint planning, daily stand-ups, retrospectives and sprint reviews.

Collaborate closely with product managers, architects, and collaborators to define priorities, refine requirements, and align on strategic technical goals.

Design and develop an automation platform for benchmarking, monitoring, and analyzing HPC data centers.

Perform Data analysis and data engineering on benchmarking results.

Integrate with external large-scale data storage solutions.

Create and maintain interactive dashboards in Power BI.

Develop AI infrastructure and agent-based solutions to improve usability, observability, and debuggability.

We are looking for a Senior Chip Design Verification Engineer for developing the next generation DFT technologies.

As a Senior Chip Design Verification Engineer in the DFT team, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

We are seeking a Senior Customer Program Manager - Generative AI to support the planning and execution of technical and operational programs for key partners and maintain strong customer relationships. As a key member of the Customer Program Management Team, this role will drive collaboration with major enterprise customers, cloud service providers, Tier-1 partners, and OEMs. The ideal candidate will bring strong technical program management expertise, a solid engineering background, and the ability to thrive in fast-paced environments while ensuring successful outcomes for both internal teams and external collaborators.

What you will be doing:

Define and manage program schedules, deliverables, and turning points aligned with customer roadmaps and requirements.

Translate customer requirements into actionable tasks for all functional teams, driving timely issue resolution across engineering, quality, logistics, and sales.

Provide horizontal leadership to drive cross-functional program execution, managing high priority issues/concerns, and coordinating globally dispersed teams to ensure clear alignment on objectives.

Act as the primary customer interface, facilitating program kick-offs, technical discussions, design reviews, issues/bug tracking and resolution, customer qualification/validation efforts, and status updates throughout the product lifecycle.

Drive program execution from design through production deployment, ensuring on-time delivery, quality, and customer acceptance.

Provide ongoing post-deployment sustaining support, serving as case manager for high priority concerns within the generative AI domain.

Monitor factory production schedules, yields, and blockers, collaborating with ODM/contract manufacturers to resolve issues and meet operational targets.

Proactively communicate program health, risks, and key issues to both customers, internal partners, and leadership (Hardware, Software, Operations, Business, Quality, Sales, and Product Teams), ensuring transparency and alignment.

We are looking for a passionate Software Engineer to join our Simulation development team. Our team is growing, and we are looking for hardworking and experienced engineers to take part in building advanced networking simulation solutions. You will be part of a team developing next generation Switch simulation, works closely with other SW R&D teams and SW Architects.

What you will be doing:

Design and develop advanced features simulating our world class Switches.

Develop solutions using advanced virtualization technology.

Write clean, efficient and maintainable code.

Collaborate with team members, SW R&D, Architects, Chip Design and FW.

Our networking VLSI team is looking for a CAD engineering manager. The team is providing methodologies and vendor-based EDA flows for the physical design execution teams. Your team will be responsible for defining and developing methodologies and flows that enable high quality and super-efficient execution of over a hundred physical design engineers. You will be working closely with the physical design technology team, with design engineering professionals and project leads, and with peer software/CAD teams, hence you will need to possess strong interpersonal skills, be a quick learner, and manage multiple missions in a results-oriented manner. You, along with the team, will lead processes from requirements understanding, through software definition and implementation of tools/flows, ending with release, integration and support.

What you'll be doing:

Lead a growing team of ~5 professional CAD engineers.

Own the definition, development, and maintenance of software solutions for physical design engineering.

Collaborate and closely interact with design technology experts and execution engineers, along with software/CAD peers.

Influence and make right choices to produce high quality and tangible impact.

Be agile and make continuous and incremental progress by decomposing the problem in to smaller and achievable goals.

Define and build strategic vision for the networking VLSI technology and EDA team.

We are at the forefront of AI-driven innovation in VLSI design automation. Join us to shape the future of semiconductor design with cutting-edge AI tools and make a significant impact in a collaborative, high-performance environment. Are you ready to push the boundaries of whats possible in VLSI CAD? Come be part of our pioneering team!

What you'll be doing:
You will be responsible for developing and integrating advanced CAD solutions and automation flows using AI and machine learning for VLSI design, verification, and implementation.
Work closely with design, verification, and CAD teams to identify areas for improving VLSI workflows using advanced tools and methods.
Research, prototype, and deploy AI-based algorithms.
Develop and maintain scripts and automation infrastructure to enable seamless adoption of AI tools in the VLSI design process.
Continuously review emerging AI technologies and methodologies to keep our CAD environment up-to-date.
Provide technical support and training to engineering teams on AI-enabled CAD flows and best practices.

We are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.

As a design engineer in the DFT design team, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are seeking a skilled and motivated Automation Practical Engineer (Operator) with 5 years of experience to join our group. In this role, you will play a crucial part in ensuring the reliability and performance of our products through comprehensive automated testing and taking full responsibility for regression cycles. You will work with a variety of operating systems and projects, ranging from drivers to user applications, and will develop new automation frameworks for regression testing in complex environments.

What youll be doing:

Monitoring & Debugging: Monitor and debug night regression runs, quickly identifying and resolving issues to maintain continuous testing cycles.

Automation Development: Design, develop, and implement automated testing frameworks for regression testing, particularly over a simulated Virtual Machine environment, to ensure the stability and performance of our products.

Complex Configuration Management: Gain a deep understanding of complex customer configurations to tailor and optimize automated test environments.

Multi-OS Environment: Manage and execute tests across multiple operating systems, including Linux, Windows, VMware, and FreeBSD, to ensure comprehensive coverage and compatibility.

Cross-Project Collaboration: Work across various projects, from low-level driver testing to high-level user application verification, ensuring that all components of the product meet our stringent quality standards.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for an excellent System Eng. First line manager to join our group in Yokneam.

As the team manager, you will be leading a development team responsible for the System bring up of the Next-generation networking products. The team focus is on Firmware validation tests for advanced cutting-edge NVIDIA networking and AI platforms and silicon. We drive the data growth of the worlds biggest companies, Working with talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.


What you will be doing:

Lead a team of engineers and provide technical guidance and career mentorship to the team of highly skilled engineers. Empower the team members to excel and increase team productivity.

Define and implement new product integration and validation in the core of our HCA and DPU products.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team.

Collaborate with architecture, product and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon activities of our next-generation networking products.

Gain a deep understanding of networking technology, system debugging, as well as the HW/FW/SW relationship.

We are seeking a Networking Software Engineer to join our RDMA Transport Software team, driving the development of next-generation RDMA solutions for AI, cloud, HPC, and storage. You will research and develop innovative transport algorithms that push the limits of performance and scalability. You will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises

What you'll be doing:
Take part in research, design, and development of advanced RDMA transport mechanisms and algorithms, enhancing performance, reliability, and scalability.
Collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.
Keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process.

We are spearheading the AI revolution and the creation of state-of-the-art accelerated compute platforms for global utilization. Our Network Modeling and Performance Insights group is seeking a skilled and driven Software Developer for the design and development of our infrastructure for a complex networking simulation as a service. In this role, you will be responsible for developing and optimizing our network simulation software, and to enhance its performance and quality. You will work on integrating this infrastructure with cloud computation services for various use cases and ensure the simulation is available as a service for internal and external customers. If you're passionate about tackling intricate challenges and contributing to comprehensive software solutions, we want to hear from you.

What you'll be doing:

Enhance simulation runtime and memory consumption through innovative optimization techniques.

Improve the quality of the simulation as a software product, ensuring robustness and reliability.

Expends the simulation versatility to accommodate new various and complex user use cases and bleeding-edge requirements.

Design and expose the simulation as a service to facilitate easier access for different stakeholders.

Integrate a new simulation management system, making simulated experiments data accessible to all users.

Design and develop a CI/CD infrastructure for our complex networking simulation tool, ensuring efficient deployment and smooth integration processes.

What you'll be doing:

Supervise and coordinate a senior software engineering team responsible for constructing post-silicon power and performance infrastructure and automation tools.

Define the architecture and roadmap for scalable characterization and stress frameworks used in production and validation environments.

Deliver tools that enable power, transient, and functional stress at both silicon and system levels.

Drive automation, CI, and infrastructure guidelines to support regression, data collection, analytics, and reproducibility.

Partner with architecture, hardware, firmware, performance, and production teams to translate silicon requirements into robust software solutions.

Ensure high software quality, maintainability, and documentation aligned with our engineering standards.

Support silicon bring-up, characterization and high-volume manufacturing readiness.