לוח משרות דרושים מהנדס וריפיקציה | ולידציה

we are the global innovator and leading solutions provider of end-to-end wireless connectivity, specializing in transport, access, and AI-powered managed & professional services. Through our commitment to excellence, we empower customers to elevate operational efficiency and enrich the quality of experience for their end users.
Our customers include service providers, utilities, public safety organizations, government agencies, energy companies, and more, who rely on our wireless expertise and cutting-edge solutions for 5G & 4G broadband wireless connectivity, mission-critical services, and an array of applications that harness our ultra-high reliability and speed. our company solutions are deployed by more than 600 service providers, as well as more than 1,600 private network owners, in more than 130 countries.
Through our innovative, end-to-end solutions, covering hardware, software, and managed & professional services, we enable our customers to embrace the future of wireless technology with confidence, shaping the next generation of connectivity and service delivery.
our company delivers extremely reliable, fast to deploy, high-capacity wireless solutions for a wide range of communication network use cases, optimized to lower TCO through minimal use of spectrum, power, real estate, and labor resources - driving simple, quick, and cost-effective network modernization and positioning our company as a leading solutions provider for the connectivity everywhere era.
System Verification & Validation Testing Engineer (V&V) - Drive end-to-end validation of complex systems and cutting-edge features. Functional and performance validation for next-gen wireless communication systems.
5G Wireless Backhaul Testing - Test and validate wireless 5G backhaul systems connecting broadband sites to the core network delivering high-speed connectivity
Codeless Automation - Design, run, and analyze automated test suites using codeless platforms to accelerate feature validation and reduce manual effort.
Failure Analysis & Debug Leadership - Lead investigations into system failures and performance issues using data-driven techniques and AI-assisted diagnostics.
Test Scenario Design & Execution - Define and execute comprehensive test plans to ensure robust functionality, scalability, and real-world resilience.
System Bring-Up & Test Setup Ownership - Build, configure, and maintain advanced test environments from the ground up
Contribute to system validating that redefines efficiency through IoT, AI integration, and advanced communication protocols.
Hybrid - 4 days onsite, 1 day remote
By joining our team, you will become a key player in our System Verification & Validation (V&V) group - where innovation meets execution.
We test the systems that power tomorrows networks: smart, wireless, and built for scale.
Also, you will enrich your experience and become a technical professional in the field of testing high-end telecommunication technology.I-POST.

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

Nuvoton Israel is a leading supplier of SoCs, microcontrollers and security hardware solutions for tier-1 customers in the computing and server business. A self-contained design center, spanning from product management, system and chip architecture, through design, software development, system engineering and production. Our products combine unique sets control, management, and advanced security solutions, enabling our customers to establish differentiation in their end markets. We are looking for a Chip Design Verification engineer to join our Verification team! This is your opportunity to have an impact on the design of millions of computers sold worldwide each year by leading brands.
The role includes: - Building complex verification environments - Meeting the challenges presented by state-of-the-art design - Continues professional growth using the most advanced tools and methodologies - Use AI for improved productivity

We are looking to hire a talented Verification Engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips. If you are motivated and skilled in VLSI and excited about AI, we want to meet you!
Responsibilities
Collaborate with architecture and design teams to define and implement comprehensive testcases for NN processor and SoC blocks and flows.
Maintain, enhance, and scale the UVM‑based verification environment to support efficient and robust verification.
Own end‑to‑end verification of system flows to ensure the design is fully functional, correct, and meets performance expectations.
Drive root‑cause analysis and debug across RTL, testbench, and system layers to ensure high‑quality design closure.
Define, track, and close functional and performance coverage to guarantee verification completeness.
Continuously improve verification methodologies, automation, and workflows to increase productivity and coverage efficiency.

As a Design Verification Engineer, you will be responsible for ensuring "bug-free first silicon" for complex IP and SoC designs. You will drive all phases of pre-silicon verification, from defining methodologies and test plans to RTL freeze and tape-out sign-off. These roles are highly collaborative, requiring close interaction with architecture, design, and software teams across global sites.
Responsibilities
Architect and develop scalable, portable verification environments, including UVM-based testbenches, protocol monitors, agents, and checkers.
Define detailed test and coverage plans based on micro-architecture specifications and extract features for DV attributes.
Create and simulate test scenarios, perform advanced debugging, and conduct end-to-end simulations of data/control paths.
Drive regression and coverage analysis (metric-driven verification) to ensure the highest quality, productivity, and time-to-market.
Partner with architects and designers from the early stages of feature definition to influence IP/SoC specifications.
Apply formal verification, hardware acceleration, and power/performance (NLP) analysis where applicable.