רובוט
היי א אי
stars

תגידו שלום לתפקיד הבא שלכם

לראשונה בישראל:
המלצות מבוססות AI שישפרו
את הסיכוי שלך למצוא עבודה

מהנדס וריפיקציה | ולידציה

מסמך
מילות מפתח בקורות חיים
סימן שאלה
שאלות הכנה לראיון עבודה
עדכון משתמש
מבחני קבלה לתפקיד
שרת
שכר
משרות על המפה
 
בדיקת קורות חיים
VIP
הפוך ללקוח VIP
רגע, משהו חסר!
נשאר לך להשלים רק עוד פרט אחד:
 
שירות זה פתוח ללקוחות VIP בלבד
AllJObs VIP

חברות מובילות
כל החברות
כל המידע למציאת עבודה
5 טיפים לכתיבת מכתב מקדים מנצח
נכון, לא כל המגייסים מקדישים זמן לקריאת מכתב מק...
קרא עוד >
לימודים
עומדים לרשותכם
מיין לפי: מיין לפי:
הכי חדש
הכי מתאים
הכי קרוב
טוען
סגור
לפי איזה ישוב תרצה שנמיין את התוצאות?
Geo Location Icon

לוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities:

Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
2+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered)
Self-motivated, ability to work, lead and drive tasks to completion.
Great interpersonal skills.
Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, and Unix/Linux environments, scripting languages (Python, etc.) and version control.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826548
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Caesarea
Job Type: Full Time
In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.



Responsibilities:

Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered)
Self-motivated and able to lead and drive tasks to completion.
Great interpersonal skills.
Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, Unix/Linux environments, scripting languages (Python, etc.) and version control.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826546
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
17/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.

The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.

Responsibilities:

Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it
Requirements:
At least 5 years experience.
Ability to ramp up verification environments from scratch
Experience with UVM, System Verilog - Advantage
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826187
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
17/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.

The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and quantum physicists.

Responsibilities:

Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it
Requirements:
3- 5 years of experience with UVM, System Verilog.
Ability to ramp up verification environments from scratch.
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI).
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826177
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Ramat Gan
Job Type: Full Time
Required Experienced SoC Verification Engineer
About the team:
Our SOC verification group owns the important and challenging job of verifying our chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.
Requirements:
BSc in electrical engineering, computer engineering or computer science.
7+ years of experience working in verification environment, tests, and test bench development (C/C++/SV).
TestPlan defining and Coverage-Driven Verification experience.
Fullchip/SOC verification experience, strong system understanding.
Good debug capabilities using the latest EDA tools.
Knowledge in Industry Standard protocols such as AXI/ACEL/OCP/CHI.
Nice to have:
SW embedded experience, C/C++ skills.
Strong skills in scripting Perl/Python.
System Verilog writing skills, preferably in OVM/UVM.
3rd-party IPs integration testing experience.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826143
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
The Product Validation department is looking for a Validation Engineer.
Our department is responsible for delivering high-quality ADAS (Advanced Driver Assistance Systems) products.
We are the first line of support for our customers around the globe, and as our Validation Engineer, you will interact with most of our departments to achieve our goals.
What will your job look like:
Perform system-level validation of embedded systems, covering both hardware and software, with a strong focus on functional testing
Design and maintain test environments, including lab setups, test systems, and configurations.
Write and execute test plans and test cases based on system requirements, including manual and automated tests.
Validate communication protocols and system interfaces, and perform hardware bring-up and integration testing.
Install and support debug systems and sensors on development vehicles and assist automotive customers during integration.
Requirements:
B.Sc. in Electrical Engineering, Electronics Engineering, Communication Systems / Telecommunications Engineering, or equivalent.
At least 3 years of experience in validation, verification, or QA engineering.
Proven experience with embedded systems testing.
Experience working with communication protocols and basic networking concepts (e.g., data flows, interfaces, protocol behavior).
Hands-on experience with Linux-based systems.
Experience in test infrastructure, lab environments, and test setups.
Strong analytical, debugging, and problem-solving skills.
Strong teamwork abilities and excellent interpersonal communication skills.
Familiarity with defect tracking and validation tools (e.g., Jira) -an advantage.
Fluent in English and Hebrew.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826079
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
Product Validation department is looking for a Validation Engineer Team Lead.
Our department is responsible for delivering high-quality ADAS (Advanced Driver Assistance Systems) products. We are responsible for integration and validation of our products on customer systems. And as our Validation Engineer Team Lead you will be interacting with most of our departments, to achieve our goals.
What will your job look like?
Lead and guide a team of system validation engineers.
Work closely with the different Project managers to drive and ensure proper validation plan
Work closely with R&D teams across In order to establish a proper test plan and to achieve fast Root-Cause of issues that arise during the system testing phase
Test and evaluate the system functionality & performance in both hardware and software aspects.
Drive test development and integration methods, to ensure high-quality products.
Executing Manual tests as well as built-in automated test sets (Hands-on).
Requirements:
B.Sc. in Electrical/Mechanical Engineering or a related field.
At least 2 years of experience leading a validation team.
Proven hands-on experience with embedded systems testing and validation.
Experience with communication protocols and basic networking concepts, including data flows and interfaces.
Hands-on experience working with Linux-based systems.
Strong analytical, debugging, and problem-solving skills.
Proactive, results-oriented mindset with a can-do approach.
Fluent in English and Hebrew.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8826069
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
מיקום המשרה: תל אביב יפו
סוג משרה: משרה מלאה
קצת על התפקיד:
הקמה וניהול צוות ורפקציה וקושחה (FPGA) מולטי-דיסציפלינארי.
Hands-On ביצוע תכן ובדיקות לוגיות של רכיבים מתכנתים או מודולים בתוכם.
תכנון ארכיטקטורה לאימות ותכנון לוגי ברמת על.
יצירת והטמעת נהלים ושיטות פיתוח מתקדמות הכוללות פיתוח IPs ושיטות לפיתוח תכנים גנריים.
הקמת סביבת וריפקציה UVM מלאה, כולל שימוש ב Verification IPs פנים חברתיים וחיצוניים.
אחריות מערכתית של ה FW וממשקיה, העמקה וחידוד של דרישות המערכת.
הגדרת Test Plan לסביבה, ויישום לפי מתודולוגיית UVM.
יכולת ואחריות על חניכה וביצוע בקרה מקצועית על הצוות.
עבודה שוטפת עם מפתחי FPGA ומהנדסי המערכת, ובנוסף עבודה עם מפתחי תוכנה-תשתיות תוכנה בהתאם לצורך.
דרישות:
תואר ראשון בהנדסת חשמל ואלקטרוניקה/ מחשבים/ תוכנה- חובה. תואר שני - יתרון.
ניסיון של 5 שנים לפחות בפיתוח רכיבים מתוכנתים FPGA - חובה.
ניסיון של 5 שנים לפחות ב - System Verilog verification חובה.
נסיון בהובלת צוות של לפחות 2-3 מתכננים - חובה.
ניסיון מוכח של לפחות 3 שנים בפיתוח סביבות וריפיקציה בSystem Verilog במתודולוגיית UV
ניסיון בהקמת צוות עבודה ותשתיות- יתרון. המשרה מיועדת לנשים ולגברים כאחד.
 
עוד...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8824278
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
מיקום המשרה: חיפה וסביבתה
סוג משרה: משרה מלאה
קצת על התפקיד:
מהנדסת וריפיקציה לתכנון ופיתוח סביבת וריפיקציה (Block level & Full chip).
תואר ראשון בהנדסת חשמל ואלקטרוניקה/ מחשבים/ תוכנה. תואר שני - יתרון.
רקע משמעותי בתכנות מונחה עצמים (OOP).
ניסיון של שלוש שנים בפיתוח וריפיקציה ב- System Verilog UVM\ Specmane.
ניסיון בעבודה בסביבת LINUX.
רקע ב- VHDL\ Verilog - יתרון.
ניסיון בכתיבת Scripts - יתרון.
ניסיון בכלי ניהול Regressions - יתרון.
ניסיון הובלת צוותי פיתוח - יתרון.
דרישות:
עבודה בפיתוח של מערכות מורכבות.
תפקיד מאתגר מול קבוצות פיתוח שונות.
לקיחת חלק משמעותי בהליך הפיתוח, החל משלב התכנון ועד לייצור.
מרחב להתפתחות אישית ולהעמקה/ הרחבת ידע. המשרה מיועדת לנשים ולגברים כאחד.
 
עוד...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8823713
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/09/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
We're looking for a Design Verification Team Lead - a design verification technical lead that is responsible for complex SoC sub-system, with cutting edge technology for Nitro system SoC, the foundation of AWS's virtualization, networking, and storage offload infrastructure.

It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written

It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack, with particular emphasis on networking workloads such as ENA and EFA

It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality

It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development

Key job responsibilities

- Develop and execute verification plans for IO sub-systems - covering interconnect protocols, peripheral interfaces, and system-level integration with a strong connection to networking flows (ENA/EFA).

- Verify IO sub-system features, including interconnect protocols and various accelerator engines.

- Develop and debug C embedded SW as part of hardware-software integration verification.

- Build and maintain UVM-based verification environments for various clusters and sub-systems.

- Verify ARM advanced interconnect protocols (AMBA CHI/ACE/AXI) ensuring correct coherency transactions, performance verification, and protocol compliance.

- Verify the IO virtualization SMMU/TLB operations, page table walks, translation granules, and memory attributes (cache-ability, share-ability).

- Develop constrained-random and directed test strategies targeting corner cases in IO protocol hazards, coherency races, and system boundary conditions.

- Drive coverage closure using functional coverage models, assertion-based verification, and formal methods where applicable.

- Contribute to performance verification - ensuring micro-architectural implementations meet performance targets alongside correctness.
Requirements:
Basic Qualifications
- 8+ years of experience in design verification of complex SoC or ASIC projects.
- Strong communication skills with the ability to collaborate across design, software, and physical design teams.
- Proven track record leading verification of IO sub-systems, interconnect fabrics, or system-level integration blocks.
- Deep expertise in UVM/SystemVerilog-based verification environments.
- Experience driving verification from product definition through post-tapeout silicon validation.
- Experience with performance verification methodologies alongside functional correctness.

Preferred Qualifications
- Strong knowledge of ARM interconnect protocols (AMBA CHI/ACE/AXI) and coherency verification.
- Experience with IO virtualization verification (SMMU, TLB, page table walks, memory attributes).
- C/C++ embedded software programming and firmware-level debug skills
- Experience with hardware-software co-verification.
- Familiarity with networking data paths and offload architectures.
- Understanding of physical design aspects and their impact on functional verification (e.g., clock domain crossings, power-aware verification).
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8813332
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/09/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
We are looking for talented engineers to join the Pre-silicon Verification team and help us technically lead the challenges of the next decade, developing a semiconductor platform based on revolutionary architecture, and taking part in the development of cutting-edge products within a disruptive system architecture.
Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment.
Requirements:
Basic Qualifications
- B.Sc. in Electrical or Computer Engineering. Please include your academic transcript with your CV in a single PDF
- Understanding of object-oriented programming concepts
- Knowledge of Verilog/SystemVerilog/Specman

Preferred Qualifications
- Familiarity with hardware verification concepts and tools (UVM , Coverage Driven verification)
- Experience with at least one scripting language (Python, Perl, Bash, or Tcl)
- Knowledge of PCIe, Processors, Ethernet, DDR
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8813330
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Herzliya
Job Type: Full Time
In this role, you will join a world-class team of engineers within the Surgical Operating unit responsible for developing medical devices that focus on lung cancer diagnosis.
Our Surgical Operating Unit is one new, powerful operating unit bringing together the people and product portfolio of Surgical Robotics and Surgical Innovations. With our Mission as our North Star, we will build on our legacy of proven surgical solutions and advance the promise of robotics and digital solutions to benefit our customers and patients.
Make your impact by exploring a career with the worlds leading Medical Device company, striving to alleviate pain, restore health, and extend life.

We are seeking a highly qualified and detail-oriented Software Verification Engineer to join our software verification team. This position involves verification and integration of complex, multidisciplinary medical systems. The role requires direct collaboration with cross-functional teams, including software, algorithm, and hardware engineering, to ensure the system meets all functional and performance requirements.

Responsibilities may include the following and other duties may be assigned:
Designing and executing SW verification activities: Proactively identify gaps in performance, accuracy, and quality across the software and algorithmic components of the system. Develop and prioritize test strategies based on risk, impact, and business needs. Create comprehensive test plans to validate functionality, accuracy, and performance.
Automation and continuous improvement: Contribute to the development and expansion of automated testing solutions. Continuously look for ways to improve test efficiency, coverage, and reliability by adopting new tools, scripting approaches, and creative testing methods.
Performing script-based testing: Develop and maintain test scripts to automate and enhance testing processes using Python, MATLAB, or other tools.
Collaborating with cross-functional teams: Work closely with cross-functional teams, including software, algorithm, hardware engineering, quality, and regulatory, to ensure successful testing outcomes.
Requirements:
Required Knowledge and Experience:
Education: Bachelors degree in engineering, with a preference for Biomedical Engineering.
At least 1 year of experience in software verification, algorithm validation, or system integration, preferably in the medical device industry.
Hands-on experience with multidisciplinary systems involving software, hardware, and algorithms.
Basic programming (MATLAB, Python) skills, hardware understanding, and experience with complex, cross-functional systems.
Experience with test automation is a strong advantage.
Strong analytical skills, a methodical approach to problem solving, and good documentation abilities.
Excellent interpersonal and communication skills; ability to collaborate effectively with cross-functional teams.
Comfort working in lab environments, including live/tissue animal, and cadaver labs, as well as with fluoroscopy systems.
Availability to work on-site in Herzliya at least 4 days per week.


Physical Job Requirements:
The above statements are intended to describe the general nature and level of work being performed by employees assigned to this position, but they are not an exhaustive list of all the required responsibilities and skills of this position. 
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8813235
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Herzliya
Job Type: Full Time
In this role, you will join a world-class team of engineers within the Surgical Operating unit responsible for developing medical devices that focus on lung cancer diagnosis.
Our Surgical Operating Unit is one new, powerful operating unit bringing together the people and product portfolio of Surgical Robotics and Surgical Innovations. With the Mission as our North Star, we will build on our legacy of proven surgical solutions and advance the promise of robotics and digital solutions to benefit our customers and patients.
Make your impact by exploring a career with the worlds leading Medical Device company, striving to alleviate pain, restore health, and extend life.

We are seeking a highly qualified and detail-oriented Software Verification Engineer to join our software verification team. This position involves verification and integration of complex, multidisciplinary medical systems. The role requires direct collaboration with cross-functional teams, including software, algorithm, and hardware engineering, to ensure the system meets all functional and performance requirements.
Responsibilities may include the following and other duties may be assigned:
Technical leadership: Serve as a technical leader within the verification team, providing guidance, reviewing test approaches and deliverables, and mentoring less-experienced engineers.
Independence: Demonstrated ability to independently lead complex verification initiatives, make sound technical decisions, and drive issues to resolution.
Designing and executing SW testing strategies: Proactively identify gaps in performance, accuracy, and quality across the software and algorithmic components of the system. Develop and prioritize test strategies based on risk, impact, and business needs. Create comprehensive test plans to validate functionality, accuracy, and performance.
Continuous improvement of testing processes: Identify process improvement opportunities by implementing new tools and optimizing methods.
Performing script-based testing: Develop and maintain test scripts to automate and enhance testing processes using Python, MATLAB, or other tools.
Collaborating with cross-functional teams: Work closely with cross-functional teams, including software, algorithm, hardware engineering, quality, and regulatory, to ensure successful testing outcomes.
Requirements:
Required Knowledge and Experience:
Bachelors degree in engineering, with a preference for Biomedical Engineering.
3+ years of experience in software verification, algorithm validation, or system integration, preferably in the medical device industry.
Hands-on experience with multidisciplinary systems involving software, hardware, and algorithms.
Basic programming (MATLAB, Python) skills, hardware understanding, and experience with complex, cross-functional systems.
Experience with test automation - a strong advantage.
Strong analytical thinking, documentation skills, and a methodical approach to problem-solving.
Comfortable working in lab environments, including live tissue/animal, and cadaver labs, as well as with fluoroscopy systems.
Availability to work on-site in Herzliya at least 4 days per week.


Physical Job Requirements:
The above statements are intended to describe the general nature and level of work being performed by employees assigned to this position, but they are not an exhaustive list of all the required responsibilities and skills of this position. 
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8813231
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/09/2026
Location: Netanya
Job Type: Full Time
we are a fast-growing global medical device company that develops and manufactures innovative drug-delivery and infusion solutions across the continuum of care, from hospital to home. We are looking for an experienced V&V Manager to lead our V&V function and team within the R&D
Job Description
* Lead the V&V function and define the verification and validation strategy for new products and design changes.
* Manage, develop, and provide technical leadership to a multidisciplinary team of V&V engineers, including goal setting, workload allocation, mentoring, and performance development.
* Ensure complete, risk-based TEST coverage and traceability from product and system requirements through TEST evidence and final reports.
* Review and approve V&V plans, protocols, reports, deviations, and supporting technical documentation.
* Oversee system -level hardware, software, mechanical, and disposable-set testing in the R&D laboratory and at external laboratories and subcontractors.
* Lead experimental design, data analysis, structured problem-solving, and root-cause investigations.
* Plan resources, equipment, schedules, and priorities, and monitor execution against project milestones and quality objectives.
* Partner with Systems, R&D, Quality, Regulatory, Clinical, and Project Management teams, and provide V&V support during audits and regulatory submissions. Reports to: R&D Director
Requirements:
* B.Sc. in Biomedical, Systems, Electrical, Mechanical, or a related engineering discipline.
* At least 5 years of R&D experience in the medical-device industry, including at least 2 years of direct management experience leading technical or V&V staff.
* Hands-on experience planning and leading system -level V&V for multidisciplinary medical devices combining hardware and software.
* Strong knowledge of medical-device design controls, requirements traceability, risk-based V&V, and quality- system requirements.
* Demonstrated experience developing, reviewing, and approving V&V strategies, plans, protocols, reports, and TEST deviations.
* Strong leadership, project-management, analytical, and root-cause investigation skills.
* Excellent cross-functional communication and stakeholder-management skills, with the ability to manage multiple priorities.
* Fluent written and spoken English. Advantages
* Experience with infusion pumps, drug-delivery systems, or other active medical devices.
* Working knowledge of relevant standards, such as ISO 13485, ISO 14971, IEC 60601-1, IEC 60601-1-2, IEC 62304, and IEC 62366-1.
* Experience managing external laboratories and electrical safety, EMC, reliability, usability, or environmental testing.
* Experience with sterilization validation process using EtO or radiation.
* Experience with TEST automation, statistical analysis, or V&V performance metrics.
* M.Sc. in Engineering or a related field.
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8812867
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.
The Verification engineer we look for will be a highly talented and motivated person, who is a real team player and can collaborate closely with engineers from other disciplines and physicists.
Responsibilities:
Practicing the full range of verification aspects
Creating a verification environment from scratch (drivers, monitors, coverage...)
VIP (DDR/PCIe/AXI) integration
Defining verification sequences via a complex control-flow constraint set
System understanding of a full-stack product with strong HW-SW coupling
Reference model integration
Test plan definition
Defining verification flows and creating the proper infrastructure to support it
Requirements:
At least 5 years experience.
Ability to ramp up verification environments from scratch
Experience with UVM, System Verilog - Advantage
Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
Good understanding of HW/SW interaction- Advantage
Knowledge in C/C++/Python/System C - Advantage
This position is open to all candidates.
 
Show more...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8812675
סגור
שירות זה פתוח ללקוחות VIP בלבד
משרות שנמחקו