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we are looking for RT SW Developer.

Were growing and looking for another important piece of the puzzle DevOps Infrastructure Team Leader.
What youll do:
Establish and nurture a culture of excellence within the DevOps team, promoting best practices, effective work processes, and methodologies. Lead by example and mentor the team to foster a collaborative and high-performing environment.
Set clear goals and technical direction, aligning team priorities with organizational objectives and ensuring timely execution of deliverables.
Recruit, coach, and develop engineers, fostering a culture of continuous learning and ownership while supporting their professional growth.
Design, implement, and maintain scalable, secure, and reliable infrastructure solutions.
Build and maintain automation frameworks to streamline deployments, enforce security and compliance standards.
Continuously evaluate and introduce new technologies, methodologies, and tools to improve performance, observability, resilience, and scalability.
Act as the technical point of contact for DevOps, guiding the team through complex challenges and advocating for DevOps principles across the organization.

we are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance.
Join Our Team as a System Architect at our company!
Technical Characterization and System Design:
Spearhead the technical characterization, system design, and architecture of radar-based electronic systems.
Drive innovation and efficiency in system design processes, ensuring optimal performance and reliability.
Leadership in Field and Lab Experiments:
Lead field and lab experiments to validate and optimize system functionalities.
Collaborate with cross-functional teams to plan system tests layout, ensuring comprehensive and insightful results.
Performance Data Analysis:
Analyse system performance data to derive meaningful insights and recommendations.
Implement data-driven improvements and optimizations to enhance overall system efficiency.

we are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance. We are looking for a talented Technical Manager to join our team!
The Technical Manager leads the technical engagement with customers, collaborating closely with internal departments to develop and deliver comprehensive solutions tailored to meet customer needs.
Key Responsibilities
Customer Engagement and Requirements Analysis:
Engage with potential and current customers early on to understand their operational and technical requirements.
Assess and provide tailored solutions that align with customers needs.
Pre-Sales Technical Authority:
Prepare the technical and operational components of proposals and responses to customers.
Lead and conduct product demonstrations to showcase the capabilities and advantages of our companys solutions.
Assist and advise the Business Development Group with technical insights and recommendations.
Technical Risks and Opportunities Analysis and Management:
Identify and analyze potential technical risks and opportunities associated with customer projects and internal processes.
Manage risk mitigation strategies to ensure project success and customer satisfaction.
Take part in the LOB strategy definition and execution:
Conduct comprehensive competitor monitoring and analysis to understand market trends and competitor offerings, identify gaps and differentiators.
Utilize findings to improve our companys competitive offerings, initiate development of new capabilities and inform strategic decisions.
Programs Technical Documentation
Maintaining program technical documentation (Specifications, Design Documents, Interface Control Documents, etc.)
Manage the development and delivery of technical manuals and training to the customer
Program Management Support:
Interpret and communicate the technical aspects of projects or requests to Program Managers.
Oversee the delivery process.
Manage the technical aspects of 3rd party development programs.
System Integration and Deployment:
Lead the integration processes with customers and external systems.
Manage the fielding phase, including user acceptance tests, installation, and evaluation processes.
Collaboration and Coordination:
Work closely with our companys internal teams to ensure alignment and effective communication throughout the project lifecycle.

Nuvoton Technology Israel, located in Herzliya, is looking for an Experienced RT/Embedded Firmware Engineer to join its BMC Software development team. Nuvoton is a worldwide leader of BMC (Baseboard Management Controller) SOCs, used in Enterprise and Data Centers Servers. Our customers are Tier-1 Enterprise Server vendors and CSPs (Cloud Service Providers). As a Nuvoton employee, you will be a part a team that develops embedded software solutions for security processors, TrustZone/OPTEE and embedded I/O processors.
Responsibilities: - Design, develop, enhance, and maintain embedded firmware for Nuvoton’s BMC SOC, including Application processor, security processor and I/O processor - Collaborate with software, hardware, validation, and security teams to deliver robust and secure firmware - Collaborate with community and customers on open-source projects - Participate in SOC Pre-Tapeout activities (on emulation system and FPGA), SOC bringup and debug - Participate in customers engagement, including design and code reviews, new features development, issues debug and resolution

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

Looking for a CPU Architect for codesign of HW/SW feature for our CPUs for cellphones and servers. The role includes but is not limited to:
Analysis of technical challenges and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions (when applicable) in coordination with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts. (the HW/SW features are typically in the form of new instructions or of other Instruction Set constructs and belong to one of following domains: dense compute, general purpose accelerations, use case specific accelerations, system level instructions, Security related technologies, or instrumentation instructions.
Models CPU functionality, performance and power in simulators, analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

we are Huawei's Tel Aviv Research and Innovation Center, where we pioneer next-generation data center technologies. Our Future-Data-Center-Infrastructure group specializes in co-designing hardware and software architectures that accelerate AI workloads, optimize resource utilization, and reduce operational costs.
Working at the intersection of academic research and practical implementation, our team develops cutting-edge solutions for AI infrastructure challenges, with a particular focus on Generative AI and large language models (LLMs). We pride ourselves on fostering an environment where system-level thinking, innovation, and technical excellence drive our success in reshaping the future of data center technology.
Role Overview
As a Senior Gen.AI Infrastructure Engineer in our AI innovation team, you'll play a crucial role in advancing our LLM infrastructure capabilities, focusing on research, implementation and optimization of state-of-the-art solutions for model deployment and serving
What will you be doing?
Explore new directions and seek new opportunities for innovation through academic / industry trends tracking
Design and implement advanced optimization techniques for transformer-based models
Conduct research and stay current with academic developments in LLM optimization
Drive architectural improvements for large-scale model serving systems
Develop and optimize infrastructure components using PyTorch and other frameworks
Implement and optimize model serving solutions using frameworks such as vLLM, TGI, and MindIE
Collaborate with cross-functional teams to improve system architecture and performance.

We are looking for a talented software engineer. You will take part in developing our core product infrastructure. The challenge is to design and develop complex security components that can be integrated in a generic and flexible way for Android & IOS 3rd party applications. The code is developed with C / C ++, Python, JAVA, and Objective- C. Responsibilities
* Creatively developing, designing, and delivering new infrastructures and security features.
* Improving, testing, and debugging our current infrastructure according to customers' needs.
* Continuously learn and evaluate new technologies in the everlasting effort to perfect our product.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.

Roles and responsibilities:
The candidate will join our BE team, focusing on Full-Chip floor-planning, timing closure and integration, collaborating closely with frontend design, architecture, physical design, and analog teams. Additionally, the candidate will provide support to design teams across various methodologies and contribute to project execution efforts.
What will the candidate be doing
Lead Full Chip Layout activities & methodologies for a brand new SoC, from definition to Tape Out.
Floor Planning Top to Bottom & Bottom up FC, Sub System & Block level.
Involved in chip architecture, in close collaboration with the packaging, design & architecture teams. Exploring different floorplan structures to achieve both best area & ease of convergence.
Drive sign-off timing convergence for high performance designs at Full-chip and building block level.
Involved in definition of overall STA methodology, STA infrastructure and sign-off convergence flows, working closely with block owners throughout the project for sign-off timing convergence.
Work closely with EDA (Electronic Design Automation) vendors on latest tool feature development and qualification.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.

Roles and responsibilities:
Join a team of VLSI frontend design engineers in Chain-Reactions projects.
Define, plan and implement our next chip in Chain-Reactions on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.

We are looking for Physical Design Engineer.

Roles and responsibilities:
Build, maintain, and optimize CAD tools infrastructure supporting both commercial and in-house layout and verification tools (Cadence Virtuoso, Synopsys ICC, Mentor Calibre, etc.).
Develop and automate IC layout flows, including placement, routing, floorplanning, PCells, and tapeout preparation.
Apply advanced software engineering and CAD methodologies to address technical challenges, evaluate architectural and hardware constraints, and deliver scalable automation solutions.
Collaborate with layout, circuit, and verification teams to capture requirements and deploy efficient automation workflows.
Design and implement testing frameworks, regression suites, code review practices and CI/CD pipelines to validate CAD flows, ensure correctness, and improve reliability.
Define, document, and enforce best practices, standards, and procedures; provide technical guidance, training, and support to engineering teams.

We are looking for Emulation & Prototyping Engineer.

Roles and responsibilities:
Build and maintain FPGA/emulation platforms for large-scale SoC/ASIC designs.
Map RTL designs to FPGA/emulation platforms.
Develop test environments and infrastructure for HW/SW co-verification.
Support hardware bring-up and software validation on emulation platforms.
Collaborate with verification engineers to run regressions and accelerate debug cycles.
Optimize partitioning, synthesis, and runtime performance on emulation systems.
Work cross-functionally with RTL design, verification, and firmware/software teams.

We are seeking a System Validation & Quality Assurance Manager to define validation methodologies, set quality standards, and drive a culture of quality across multidisciplinary hardware and software systems. This leadership role emphasizes process ownership, methodology enforcement, and coaching teams, while also providing technical guidance and hands-on validation expertise.

Responsibilities:
Define and enforce validation methodologies, processes, and quality standards across firmware and embedded software.
Lead validation planning and execution reviews, ensuring coverage, consistency, and defect prevention.
Establish automation and CI/CD validation strategies and guide adoption across teams.
Mentor and coach engineers to embed quality practices and foster continuous improvement.
Provide technical leadership in system-level validation, including algorithms and machine learning within firmware and embedded software environments.
Oversee validation execution on ATE platforms, ensuring correlation between simulation, emulation, and silicon test results.
Accountable for high-level analysis of production issues, driving defect escape reviews, enhancing test coverage, and defining quality gates to enforce continuous improvement.