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We are looking for a Hardware Architect to join our growing team!
This is a great opportunity to be part of the fastest-growing infrastructure company in history. We are revolutionizing data storage solutions with its Universal Storage platform, designed to simplify AI and enterprise infrastructure.
In this role, you will participate in the definition of our reference architecture for new highly available NVMeOF JBOFs and other systems, supervise the implementation by OEMs, define acceptance criteria, and ensure a successful product launch.
Join us and contribute to shaping the future of data management while being part of a fast-growing, innovative company.

Our Networking Hardware team in Israel is looking for an experienced and skilled manager to lead hardware architecture team. The team leads the architecture of AI factory networking infrastructure for our next-generation servers focusing on accelerated performance while enabling optimized end to end GPU connectivity. Our Hardware architecture team innovative end-to-end connectivity solutions for AI factory, including switches, adapters, and optic interconnect integration into the GPU servers. Our products optimize data Center performance and deliver industry-leading bandwidth and scalability. Our products are focused on providing the most optimized power - performance communication solutions for industries like AI, ML, Cloud, Media and Entertainment as well as any other industry that can benefit from our DataStream acceleration.

We are looking for a hardware architecture Director to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead and manage the hardware next-generation end-to-end definition and architecture team, including switch, interconnect, and adapter components.
Shape the technology roadmap and strategy for next-generation hardware solutions.
Drive the vision for the hardware team, identifying needs and challenges for upcoming generations.
Facilitate communication with leadership teams and customers to ensure alignment and clarity.
Define key technical aspects, including form factor selection, signal integrity (SI), power and thermal considerations, and channel optimization (mechanical, thermal, cluster layout).
Coordinate alignment between hardware systems and chip design teams to achieve a unified definition.
Collaborate with cross-functional teams, including Engineering, Operations, and strategic vendors, to enable new technologies and products.
Be a hands-on leader, capable of independently driving new technology initiatives from concept to completion.

We are looking for a hardware architecture engineer to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead hardware next generation end-to-end definition and architecture (Switch, interconnect, adapter).

Define form factor selection; SI, power and thermal consideration, and channel optimization (Mech/thermal/cluster layout).

Align hardware systems and chip design teams toward unified definition.

Combine understanding of hardware end-to-end in parallel with Software aspects.

The position requires working closely with different Engineering and Operations teams

Looking for a Hands On Eng who is familiar with new technologies and can take a task from scratch to cocompletion with ease!

We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.

What you'll be doing:

Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.

Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.

Define the implementation of debug capabilities to support performance validation and improvements

Understand our system requirement and help define the POR of our switch product line.

Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.

Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.

Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

Required Senior Memory Subsystem Architect
Job Description:
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Required CPU Core Architect
Job Description:
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are looking for a server application and workload (Cloud, Internet, Enterprise) expert to analyse, simulate emerging workloads (Compute and AI) and develop HW and SW optimizations that will improve their PnP (power and performance).
Responsibilities:
Track and review emerging compute and AI workloads for Cloud, Internment and enterprise applications
Deploy and Simulate emerging workloads on our system simulation infrastructure
Analyze performance bottle necks and develop innovations that will improve their performance
Work with the SW and HW development team in order to incorporate these innovations into our products
Occasionally simulate and analyze performance issues reported by customers and come up with solutions.

We are looking for an experienced architect with deep technical expertise in high-speed SERDES interfaces and extensive experience working with IEEE standards such as 802.3 (including subgroups like 802.3ck and 802.3cw).
The ideal candidate will have a background in various generations of Ethernet technologies, including lower speeds from prior generations (e.g., 100G, 200G) and will play a pivotal role in pushing the boundaries of high-speed data transmission, aiming to achieve 448Gb lane speeds and beyond.
This role will involve conducting in-depth research, driving industry standardization efforts, and collaborating closely with industry partners and peers to spearhead technological advancements.

Required Senior CPU Core Architect
Hod Hasharon \ Haifa
Job Description
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Required CPU Core Micro Architect
Hod Hasharon \ Haifa
Job Description
Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

Required Senior HW architect
Hod Hasharon
About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.