Required Physical Design Team Leader
Description
We are reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.
Everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!
Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements. .
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.
Requirements: 7+ years of physical design experience
At least 2 years in technical leadership and/or people management roles.
Proficient in EDA tools such as Synopsys, Cadence, and Mentor for physical design tasks such as floor planning, placement, clock tree synthesis (CTS), routing, and timing analysis.
Expertise in timing closure, power analysis, and optimization methodologies.
Strong understanding of physical verification concepts, including DRC (design rule checking), LVS (layout versus schematic), and sign-off procedures.
Excellent team player with strong mentorship and management skills.
Demonstrated problem-solving capabilities and ability to thrive in a fast-paced, collaborative environment.
Effective verbal and written communication skills to interface with cross-functional teams and provide technical guidance.
This position is open to all candidates.