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architect end-to-end system validation strategies for new hardware platforms.
define TEST coverage and validation methodologies.
collaborate with hardware, software, qual and QA teams to align on product requirements and TEST coverage plans.
lead development of automation frameworks and diagnostics tools to enable scalable and repeatable testing.
analyze TEST data to identify root causes, guide debug efforts, and improve validation coverage.
provide technical leadership and mentorship across multidisciplinary teams and represent system TEST considerations in architecture and design reviews.

be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.as a power and signal integrity engineer, you will be responsible for the design and characterization of signal and power integrity of our ic designs. you will design the external electrical interfaces of the device, from their signal/power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our ic designs meet systems design budgets and achieve the highest performance. you will work with systems architects, asic design, systems engineers, and partner cross-functionally with teams and external vendors/partners.the ml, systems, and cloud ai (msca) organization at our designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our services (search, youtube, etc.) and our cloud. our end users are cloud customers and the billions of people who use our services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
generate precise electrical models (e.g., s-parameters, spice models) for components such as packages, pcbs, and connectors for use in simulations.
simulate high speed interface electrical behavior using hspice or other circuit simulators.
execute lab measurements utilizing TEST equipment like oscilloscopes, vector network analyzers (vna), time domain reflectometers (tdr), spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
establish design rules and guidelines for optimal signal/power integrity during pcb and package layout, ensuring high production yield and reliability.
document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including asic architects, digital/analog designers, physical design/layout engineers, and system engineers

description
we are a global leader in control systems for quantum computing, a field on the verge of exponential growth, bringing about opportunities like those made possible with the invention of classical computing 50 years ago. at qm, we provide the worlds most leading researchers and organizations with the critical tools they need to develop useful quantum computers. qms hardware and software represent a new paradigm for controlling quantum computers, from a single qubit to hundreds and thousands. we are assembling the strongest team of professionals in the world with the goal of revolutionizing how quantum computers are built and controlled and accelerating their arrival. our company is backed by globally recognized venture capital sponsors, including tlv partners, battery ventures, red dot capital partners, avigdor willenz investment group, harel insurance, and others.
we are looking for an excellent failure analysis practical engineer to join our team and build qms state-of-the-art control and orchestration platform. she or he should be a talented and motivated person, who is a real team player, and which can collaborate closely with other engineers from different disciplines and quantum physicists.
the production site is in migdal haemek ( Flex ).
responsibilities:
yield monitoring and improvement
analyze hw failures to a component level in both digital and analog domains.
identify failure trends
rma process handling
failure reports & closure

our company has continuously reinvented itself over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. nvidia is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. this is our lifes work, to amplify human creativity and intelligence!
we are looking for a senior signal & power integrity engineer. we work closely with our sites in usa and china and have access to extensive knowledge, technologies and tools. yet we are responsible for our own product line of phy ics. taking the products from concepting, through design, implementation, verification and release to customers. if you thrive working with highly skilled people that enjoy reaching challenging goals then nvidia in might be the perfect workplace for you. this is a dynamic team working with state of the art, unique technology. if you are someone that loves a challenge, come join this diverse team and help move the needle!
what you'll be doing:
design high frequencies channels up to 400gb/s per lane for pcbs, packages, connectors and cables.
design layout guidelines for our systems.
simulate passive and active elements in 3d and 2d simulation tools
measure systems in the lab using network analyzer, tdr and scope
master infiniband, ethernet and pci-ex layer 1 specifications and implementation methods
work in an intense environment and control multi-discipline expertise

seeking a highly motivated and experienced Senior Software Engineer for a position focused on developing innovative network device monitoring and visualization solution.

Meet the Team

This position is part of Silicon One organization, based in Israel. Silicon One is the foundation of industry-leading networking hardware products, pushing the boundaries of technology and driving the next generation of high-performance, scalable solutions.

Your Impact

Design and develop visualization capabilities within our SDK environment
Lead the development of a brand-new comprehensive self-monitoring system for network devices from the ground up
Implement a comprehensive model for capturing and managing network state information
Drive cross-team collaboration and technical strategy
Work closely with senior technical leadership
Create and refine technical requirements and system designs
Build new systems and frameworks from the ground up

our company has continuously reinvented itself over two decades. our invention of the gpu in 1999 sparked the growth of the pc gaming market, redefined modern computer graphics, and revolutionized parallel computing. more recently, gpu deep learning ignited modern ai - the next era of computing. our company is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. this is our lifes work, to amplify human creativity and intelligence. make the choice and join us today!
this is a dynamic team working with state of the art, unique technology. if you are someone that loves a challenge, come join this diverse team and help move the needle!
what you'll be doing:
define and perform characterization for our systems up to 400gb/s per channel.
characterization of high frequencies pcb, connectors and cable channels up to 400gb/s
perform characterization and compliance tests for optical cables and optical devices.
leading the layer 1 specifications (infiniband, ethernet, pci-ex) from all signal integrity aspects.
work in intense environment and control multidiscipline expertise.

about the job
in this role, youll work to shape the future of ai/ml hardware acceleration. you will have an opportunity to drive cutting-edge tpu (tensor processing unit) technology that powers our company's most demanding ai/ml applications. youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's tpu. you'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on tpu architecture and its integration within ai/ml-driven systems.
as a SOC vision architect in our companys silicon team, you will be at the heart of defining the hardware that powers the next-generation of our companys products. you will bridge the gap between ai research and physical silicon, architecting the image signal processor (isp), codecs and the pixel data path. you will deliver unparalleled image quality while staying within the tight power, performance, and area (ppa) constraints. you will participate in the concept, architecture, documentation, and implementation of a new product.the ai and infrastructure team is redefining whats possible. we empower our company customers with breakthrough capabilities and insights by delivering ai and infrastructure at unparalleled scale, efficiency, reliability and velocity.our companycloud customers, and billions of our company users worldwide.we're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for our company cloud, our company global networking, data center operations, systems research, and much more.
responsibilities
define a flexible imaging pipeline hardware architecture, from the sensor interface (e.g., mobile industry processor interface (mipi)) through the isp, the encoder/decoder, scaling and memory output.
partner with our company research to transform advanced computational imaging algorithms into high-efficiency hardware logic.
conduct trade-off analyses between power, performance, and silicon area to meet thermal envelopes and current limitations.
influence external executive vendor roadmaps, ensuring deep co-optimization between their future products and our company's custom silicon.
lead collaboration across architecture, register-transfer level (rtl), physical design and validation teams.

We are seeking an excellent Firmware Manager to join to GPU networking (NVLink) FW group in Tel-Aviv / Raanana. You will have the opportunity to lead development team responsible for the firmware of the next-generation networking products while being hands-on with development activities. We drive the data growth of the worlds biggest companies. With dedicated engineers around the globe, the work environment is dynamic, exciting, and fast-paced. Are you ready for the challenge?

What you will be doing:

Lead a team of engineers and provide technical guidance to the team of highly skilled engineers. Empower the team members to excel and increase team productivity.

Lead the design and implementation of new features in the core of our GPU Networking firmware.

Drive and facilitate the planning, scheduling, and execution of the project and activities of the team.

Collaborate with architecture and different software design teams as part of the software development lifecycle.

Work in pre and post-silicon development environments of next-generation our GPU networking products.

Gain a deep understanding of networking technology, system debugging, and stacks, as well as the HW/FW/SW relationship.

Innovate! Bring our Networking products to shine in customers view.

our networking division is a leading supplier of innovative end-to-end infiniband and ethernet connectivity solutions and services for servers and Storage. we offer market-leading solutions that include adapter cards, switches, optical transceivers, cables, and software to support networking technologies. our products optimize data centre performance and deliver industry-leading bandwidth and scalability. in addition, we serve a wide range of sectors including high performance computing, enterprise, data centres, cloud computing. we are constantly reinventing ourselves to stay ahead of the market and bring ground-breaking products and services to the industry by using novel technologies. our products are focused on delivering the most optimized power - performance communication solutions for industries like ai, ml, cloud, media and entertainment. 
we are seeking experienced electrical engineers with a passion for system -level thinking and innovation in high-performance optical switch development. this role offers a unique opportunity to shape and deliver next-generation products that push the boundaries of high-speed optical communication.
what youll be doing:
leading and be the technical focal point to integration of system optical phy and CPO electrical subsystems, ensuring its performance.
hands on cross-disciplinary testing efforts and lab work, collaborating with system architecture, optics, silicon, thermal, mechanical, signal/power integrity, and software teams.
characterization and testing of optical links using lab equipment (e.g., oscilloscopes, ber testers, optical spectrum analyzers and simulation tools).
driving product scalability, working with internal partners-qualification teams to transition designs from prototype to high-volume production.
documentation and reporting of design specifications, TEST results, and performance metrics.

Looking for a CPU Architect with expertise in HW/SW codesign of dense computational logic (e.g., vector, matrix)
The role includes but is not limited to:
Analysis of technical challenges in relevant use cases and determination of whether to solve them by a combination of new HW and new SW or by only one of these
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usage.
Invents corresponding HW features and SW solutions to address above challenges. Evaluates feasibility tradeoffs, explores, and defines new approaches and novel architectures for CPU. Develops the end-to-end architecture of new instructions in cooperation with partners. Drives the inclusion of the feature in a CPU project working with micro-architects, designers and verification experts.
(Preferably) models CPU functionality, performance and power in simulators.
Provides experimental/proof of concept changes for proposing design alternatives meeting performance, power, area, and timing constraints.
Reviews and influences cross functional roadmaps.
Collaborates with SW and HW architects, design, verification, and validation engineers during the execution of the project. Finds mitigations for issues that arise during implementation of his/her features.

Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.

we are a global leader in high-performance smart energy technology, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. We are seeking a skilled and motivated Practical Engineer (Electronics/Electrical) or Electronics Technician to join our Quality & Reliability team, specializing in handson failure analysis, product investigation, and testing. The ideal candidate will have solid practical experience working with electronic circuits, performing measurements, and supporting troubleshooting activities at both the board and system level. This role involves conducting detailed failure analysis, assisting in rootcause investigations, and performing experiments and tests to recreate issues and identify underlying problems. The position plays an important role in improving product reliability and supporting engineering teams. Key Responsibilities
*  Conduct electrical measurements, functional tests, and perform experiments to isolate and characterize fault mechanisms, including building TEST stations
*  Perform handson failure analysis on electronic boards, components, and systemlevel assemblies, including careful removal of potting material to enable component-level inspection and testing without damage
*  Document findings, TEST results, and root cause hypotheses in a clear and structured manner using log files, pictures, Excel, and PowerPoint
*  Support Q&R engineers in root cause investigations and the definition of corrective and preventive actions
*  Operate lab equipment including oscilloscopes, power supplies, DMMs, LCR meters, and thermal chambers
*  Collaborate with teams within Q&R and with teams outside Q&R to resolve technical issues
Country:
Israel
City:
Herzliya

We are seeking a Principal verification engineer to be a technical lead in the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and adopting new technologies. One of our main goals is to define, build and use best in class technologies make sure that the chip design team works in an efficient manner and provides high-quality deliveries at scale. This position offers the opportunity to drive foundational flows and have a profound impact in a dynamic, technology-focused company.

What you'll be doing:

Define groundbreaking methodologies to create a flawless experience for verification engineers.

Mentor and guide designers and verification specialists to tackle complex technical challenges.

Identify design risks, define the verification scope, and lead infrastructure development to ensure design correctness.

Technically guide the development process of shared verification code and infrastructure to be widely used by the global chip design team.

Partner with the design automation team to provide end-to-end solutions that unify verification, simulation, and automation.

Collaborate with EDA vendors to learn about innovative tools/technology and integrate them into our long-term verification strategy.

Lead verification strategies, training sessions.

we are now looking for a chip design Verification engineer to join the chip design methodologies team. the team is in charge of the verification methodologies, shared code, training, and embracing new technologies. one of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. this position offers the opportunity to have real impact in a dynamic, technology-focused company.
what you'll be doing:
develop shared verification code and solutions to be widely used by the chip design team.
develop groundbreaking methodologies to create a flawless experience for Verification engineers to keep the focus on new problems.
collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.
get in touch with eda vendors to learn about cutting-edge tools/technology and apply them into our verification process.
understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
collaborate with designers, verification specialists to accomplish your tasks.
develop training sessions.