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For our expansion into full system solutions, we are looking for a Senior E2E System Engineer to join our fast‑paced, innovative team responsible for bringing complex detection and monitoring systems into a high‑performance comprehensive product. This role is ideal for a hands‑on who thrives on multidisciplinary problem‑solving, system bring‑up and driving features from early integration through customer delivery and troubleshooting.
What you'll do
Lead system integration activities between LiDAR and peripherals modules, from initial bring‑up through validation and customer deployment.
Integrate various hardware modules, firmware, software, tools and algorithms into a unified system, ensuring seamless functionality across disciplines, with particular emphasis on interfaces and communication protocols.
Plan and execute (hands on) system‑level integration tests, debug complex issues, and drive root‑cause analysis with cross‑functional teams.
Develop and maintain integration workflows, test setups, and automation tools to accelerate development and validation.
Collaborate on requirements refinement, system architecture discussions, and design reviews to ensure integration readiness.
Build Python‑based tools for data analysis, test automation, and rapid prototyping to support integration and characterization activities.

Were looking for a talented Radar System Engineer to join our innovative system team. As a member of our team, you'll work on multidisciplinary system design, which combines cutting edge RF, digital, signal processing, software, hardware and chips development.
Responsibilities
Participate in the development and production of radar sensors
Debug our Radar ASIC platforms and processors
Develop subsystem specifications and process flows
Simulate and validate Radar system performance
Solve diverse complex problems and help in the debugging and integration process
Support and manage the product evaluation process involving customers.
Interface with multi-disciplinary product development team in support of design, integration and test of automotive radar systems
define system requirements for various projects.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a highly skilled Chip Top Physical Design Engineer focusing on implementation to join our local engineering powerhouse from the ground up.
If you thrive on solving complex, unnamed challenges in deep-submicron processes, your place is with us.
As a Physical Design Engineer, you will be a key hands-on member of our PD Team in the Israel R&D center. You will execute the physical design of the SoC Top level for chips that drive the worlds largest AI clusters. You will be deeply involved in all PD disciplines of the chip, driving the tape-out (T.O.) GDS to meet strict signoff criteria (Timing, LVS, EMIR, DRC, PV, etc.), ensuring our silicon meets the extreme performance, power, and area (PPA) targets required for AI scale.
Key Responsibilities
Execute SoC Top-level physical design and actively drive full-chip convergence
Perform Top-Level physical implementation, including floor-planning, Place & Route (P&R), Clock Tree Synthesis (CTS), Power/Clock distribution, Power Integrity, and Timing/Physical signoff
Work closely with the Architecture, Design, DFT, and Product teams to achieve optimal Power, Performance, and Area (PPA). This involves participating in feasibility studies for new architectures and optimizing runs to ensure the best Quality of Results (QoR)
Resolve complex signal integrity, thermal, and power challenges inherent in high-speed connectivity silicon
Collaborate closely with the Package team on Bump-map-to-Ballout design, taking all signal integrity aspects into consideration

The Engineering department is looking for a Product Leader to be responsible for End-to-End system engineering related aspects
our Engineering department is part of DMD division.
You will be responsible for overseeing all NPI-related processes, ensuring manufacturability and sustainability across our multidisciplinary products, including both hardware and software.
Responsibilities
What will you be doing:
Lead NPI activities from the early design phases (DFx, prototyping) through the first article stage, implementation (High Volume Manufacturing), and ongoing sustainability
Lead and support aspects of existing products through ECO, including new Design, Failure Analysis, Wavers review, End Of Life substitute, Procedures
Act as a focal point with Supply Chain, Purchasing, Quality, Logistics, Service and R&D
Responsible of System aspects in Production line, through product cycle- NPI to End of Life
Support Production requirements, jigs/ test tools, troubleshooting, cost reduction activity and reliability.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Junior ASIC Design Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful product ownership in a new site, designing the digital blocks that sit at the heart of our most ambitious connectivity projects.
As a Junior ASIC Design Engineer, you won't just build chips - you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving challenging problems in deep-submicron processes and want to contribute to the digital design foundation for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Design Ownership & Implementation
Own the journey from high-level definition through micro-architecture, coding, and debug to backend implementation support
Tackle complex logic challenges and transform them into elegant, high-performance hardware solutions
Serve as the point of contact for your logic blocks, interacting with Architecture, Verification, and Backend teams
Quality Assurance & Design Optimization
Utilize industry-leading EDA tools (Lint, CDC, Synthesis, Timing, Power) and in-house quality assurance tools to ensure designs are robust, scalable, and power-efficient
Apply design techniques to meet PPA (Power, Performance, Area) targets
Contribute to design quality through verification and validation activities
Methodology Innovation & Collaboration
Participate in design methodology improvements and tool automation initiatives
Leverage AI assistance tools and contribute to in-house automation development to make engineering workflows faster and smarter
Collaborate effectively across teams to ensure seamless integration.

we are at the forefront of developing autonomous driving systems with leading OEMs, by integrating our company state-of-the-art ECUs into various vehicles.
We are seeking a Embedded Systems Software Architect to own the technical direction of our embedded software platforms. This role combines hands-on development, system architecture, and technical leadership, guiding a team of embedded engineers while ensuring high-quality, scalable, and reliable software across current and future products.
You will act as the technical authority for embedded software, working closely with hardware, systems, and product stakeholders to translate requirements into robust software solutions.
What will your job look like?
Lead the technical direction and architecture of embedded software platforms across middleware and application layers.
Serve as the technical authority for embedded software, combining hands-on C/C++ development with system-level ownership.
Design scalable, modular software architectures and define clear interfaces between hardware, OS services, middleware, and application software.
Drive key technical decisions, architectural trade-offs, and long-term roadmap.
Develop and integrate middleware and application-layer components, including multi-threaded and real-time logic.
Lead design reviews, mentor embedded software engineers, and promote high coding and architectural standards.
Take ownership of complex system-level debugging, performance optimization, and software quality.
Work closely with OS, systems, product, QA, and manufacturing teams to translate product requirements into robust technical solutions.

Flo-Optics is seeking a talented SW Engineer to join our innovative team in developing cutting-edge optical solutions. This role involves designing, implementing, and optimizing software systems integral to our products.
Responsibilities:

* Design and develop software applications for optical systems.
* Collaborate with cross-functional teams to define and implement new features.
* Optimize and maintain existing software to improve performance and usability.
* Participate in code reviews and provide constructive feedback to team members.
* Troubleshoot and debug complex software issues.
* Develop and execute unit and integration tests to ensure software quality.

we are a leading semiconductor design center, developing SoCs, microcontrollers, and security hardware solutions for tier-1 customers in the computing and server space. As a self-contained R&D center - spanning architecture, chip design, software, and system engineering - we work closely with major US-based OEMs to deliver innovative, semi-custom silicon solutions. We are now extending our portfolio into AI acceleration, developing a next-generation NPU platform aimed at efficient, real-world AI deployment.
?Shape the Future of AI at the Silicon Level We are looking for a visionary Senior Technical Manager to build and lead our AI software stack for our next-generation NPU platform This is a rare opportunity to own the full software layer - from compiler infrastructure to Developer ecosystem - and make a lasting impact on how AI runs on silicon. What You'll Do; Build and lead a highly skilled AI software & algorithms engineering team, establishing engineering standards, development processes, and technical direction Define the end-to-end stack - compiler, runtime, Kernel libraries, and SDK - enabling efficient AI deployment on our NPU Drive AI compiler development using technologies like MLIR, TVM, LLVM or similar infrastructures to translate PyTorch/TensorFlow models into optimized NPU execution Champion model optimization - quantization, pruning, and hardware-aware techniques for maximum performance and power efficiency on the accelerator. Runtime, Drivers, and Firmware Integration - scheduling, memory management, and low-level software for AI workloads on-chip AI Kernel Libraries - Guide the development of highly optimized neural network Kernel libraries and performance-critical primitives tailored to the architecture of the NPU. Developer Ecosystem - Define and deliver the SDK, APIs, and development tools that allow internal teams and external developers to deploy AI models easily on the platform. Cross-Functional Architecture Collaboration - Work closely with silicon architecture and hardware design teams to ensure optimal hardware-software co-design, providing feedback on architecture, performance bottlenecks, and future ISA requirements.

we are hiring a Software Engineer to help revolutionize the world of observability. Using cutting-edge AI-driven technology, we are redefining how organizations monitor, analyze, and optimize their systems-making observability more intelligent, efficient, and accessible than ever before. As we scale, we seek top talent to push the boundaries of innovation and shape the future of AI-powered observability. If youre passionate about solving complex challenges and building game-changing technology, join us in transforming how the world understands and interacts with data.

Responsibilities:

End-to-end development and ownership of products and features, from design to scalable and predictable production behavior
Solve diverse and complex problems in a high-scale, cloud-native environment
Collaborate with other engineers and product managers to improve product functionality, scalability, and performance
Design, develop, and maintain robust, secure, and efficient software solutions
Ensure high system reliability by implementing best practices in monitoring, observability, and automation
Review code, architecture, and data to identify and troubleshoot technical and performance issues
Work with AI/ML teams to integrate AI capabilities, including model monitoring, evaluation, and fine-tuning

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Senior Design Verification Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, developing the verification environments that ensure our next-generation AI silicon performs flawlessly.
As a Senior Design Verification Engineer, you will be a vital contributor to the quality and reliability of our Israel R&D center. You will work on the front lines of functional verification, developing testbenches and environments that validate high-performance digital blocks, subsystems, and full-chip designs. You will tackle complex verification challenges that ensure our connectivity solutions meet the rigorous demands of the world's largest AI clusters. If you thrive on solving technical puzzles and want to play a key role in delivering cutting-edge AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Verification Environment Development
Contribute to the design and development of ASIC verification environments, focusing on unit-level and subsystem functional blocks
Develop and maintain SystemVerilog/UVM-based components including traffic generators, monitors, and checkers to ensure robust testing
Execute detailed verification plans for challenging digital designs, ensuring all functional requirements are met and verified
Coverage & Quality Assurance
Implement functional coverage models and analyze results to identify gaps in the verification process
Drive designs toward 100% verification closure through comprehensive test development
Contribute to verification methodology improvements and best practices
Debug & Cross-Functional Collaboration
Work closely with design engineers to identify, root-cause, and resolve complex hardware bugs early in the development cycle
Apply analytical skills and debugging techniques to solve intricate verification challenges
Collaborate effectively in a fast-paced, team-oriented R&D environment.

We are looking for a hands-on developer to join an innovative and talented R&D team. To join us, you will need to deliver high-quality code using the latest cloud frameworks and technologies.
As a Back-End Engineer you will...
Be responsible for all development aspects, from design to production, of a cloud-native product
Write high-quality, testable, and efficient code in Java / Go
Initiate and promote new ideas for the continuous improvement of product functionality
Work closely with team members and product colleagues
Lead feature development end-to-end (E2E), from initial architectural design to successful production deployment.
Write high-quality, clean, efficient, and maintainable code while adhering to best practices and coding standards
Stay up-to-date with industry trends and emerging technologies related to DevOps and the software development lifecycle
Contribute to architectural discussions and design sessions to promote scalability and maintainability.

our Embedded Division is looking for Embedded Developer to join our growing design house.
Our products and projects are in the fields of IoT, Cyber, RF, Networking, Smart-Home, Military, Medical, Low-Power, Autonomous Vehicles, Drones and much more!
You will join our embedded team in super-dynamic environment, get the ability to be exposed to the latest technologies and trends.
You MUST be fast learner to absorb new technologies
Responsibilities:
Find solutions in complex embedded environments
Lead embedded architectures from requirements to production
Lead highly-complex systems, involving FPGAs, SOCs, RF, Mobile apps, and cloud
Design, Implement and deliver directly to the customer
Collaborate with other teams members from mobile, cloud, FPGA, Hardware and mechanics

We are looking for a Photonics Layout Engineer to join our integrated photonics design team.

This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design.

In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules.

You will work closely with device designers, process engineers and tape-out teams to deliver high-quality layouts of silicon photonics PICs.

Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software.

Understanding of photonic components, waveguide routing and automated layout generation is a major advantage.

You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.

Responsibilities

Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software.

Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.).

Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths.

Verify layouts using DRC, and LVS to ensure compliance with foundry requirements.

Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts.

Optimize layouts for performance, yield, and compactness while adhering to technology constraints.

Participate in photonic design automation tool development and workflow improvements.

Prepare and manage data for tape-out and support mask review processes.

Debug layout and rule-check issues and propose corrective actions.

our company SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

we are looking for an Software Engineer to join the development of state-of-the-art radar perception algorithms. You will join the Radar group in the R&D department, where we develop cutting-edge products. These products allow our company to understand the geometry around the vehicle, which is essential for the development of our Autonomous Vehicle and the rest of our Advanced Driving Assistance Systems.
What your job will look like:
You will develop mostly in C++ (and Python)
You will develop, design, and maintain Real-Time oriented code, meeting high standards of memory and running-time requirements
You will work both independently and in collaboration with other teams at our company
Support system integration.