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DFT Intern - ASIC Student - Israel - ETR
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
Who We Are
The Design for Test (DFT) team is part of the design group, which focuses on logic design, RTL development, and running verification tests. Their main role is to design test structures embedded within the chip to ensure proper functionality after manufacturing. The goal is to detect potential manufacturing defects with maximum efficiency and filter out faulty units before they reach the market.
The ideal candidate is friendly, social, easygoing, with a good sense of humor, and has the ability to learn independently. They should be located in central\north Israel (Tel-Aviv\Caesarea). Strong independent work skills and job stability are important.
What You'll Do
Work in a small, agile team with an intimate atmosphere that offers direct mentoring and broad professional growth. Insert DFT logic, perform synthesis, and run Automatic Test Pattern Generation (ATPG) to ensure hardware testability. Execute Gate Level Simulations, timing checks, and DRC checks to maintain rigorous design integrity and performance standards. Run regressions and perform deep-dive debugging on simulation failures as part of the core verification process.

Required Post-Silicon Validation Engineer
About The Position
We build cutting-edge radar chipsets for next-generation automotive sensing systems. As a Post-Silicon Validation Engineer, you will play a critical role in bringing complex mixed-signal ICs from silicon to system readiness.
Responsibilities
Perform validation of advanced radar ICs from bring-up through full functional and performance testing
Translate system and chip-level requirements into comprehensive validation plans and test cases
Develop automated test environments using lab instrumentation and custom scripts
Execute silicon bring-up and validate key subsystems (clocking, power, CPU, interfaces, sensors)
Perform electrical and parametric validation, including high-speed, power, and interface testing
Run characterization across PVT conditions and analyze large datasets
Debug complex silicon issues and work closely with design, verification, and system teams
Support device readiness for system integration and productization.

We are seeking a System HW Engineer to define, shape, and integrate solutions for the next generation of our cloud platforms.

As a System Engineer on the hardware team, you will define systems for our Labs' Network Interface Card (NIC) hardware, support the development and validation of our NIC, and help bring the NIC to mass production.
You'll lead the implementation of new hardware interface technologies and scale them to large-scale deployment, continuously delivering a world-class customer experience. This fast-paced, intellectually challenging position requires collaboration with technical experts, senior leaders, and multiple technology teams.


Key job responsibilities
Define and design systems to support K2 cards development and manufacturing.
Define and provide feedback to the design of the K2 Smart Network Interface Card.
Work with design partners and manufacturing sites, to enable healthy mass production of the K2 card.
Analyze and debug design/manufacturing/integration issues.
Continuously assess process capabilities and innovate to simplify processes, reduce costs, and shorten the time cycle of K2 cards development and manufacturing.
Collaborate with members of cross-functional teams, to gain knowledge and improve product design, processes, and quality.
Work with customers, to optimize the entire value stream and put together joint processes that will lead to improved time cycle and lower costs.
Willing to travel abroad one or two times a year, for a week at a time.

Required Micro-Architect
Description
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At the core of the company lies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.

Our Interconnect Networking Product Engineering team is looking for an excellent hardware engineer with strong coding, analysis, and debugging skills. This role requires a deep understanding of both hardware and software to develop robust test capabilities and processes. You will drive efficient integration and provide engineering support for production testing of cutting-edge product technology. You will help ensure reliable, efficient production tests with high coverage and strong outgoing product quality.

What youll be doing:

Characterize and develop test processes of advanced interconnect products.

Play a key role in the development and bring-up of advanced hardware test solutions supporting next-generation interconnect products.

Develop embedded software capabilities packages to support various of advanced power components and Digital\ Analog ICs

Cooperate with multidisciplinary design and analysis teams for bring up, performance optimization and seamless production integration.

Lead test solution innovations to reduce test time, costs and improve overall product quality.

Develop software solutions to find, debug, and resolve problems in the production and bring-up processes.

Collaborate with overseas manufacturing and mass-production teams to improve yield, test coverage, and capacity, and to resolve production issues.

Lead advanced studies of product behavior under a wide range of system and environmental conditions.

Required HW Engineer
Ra'anana, Center District, IL
Description
Who are we?
We design and develop wireless video solutions that bring reliability, simplicity, and precision to the medical and industrial environment. Our unique technology enables Zero-Latency, High-Quality Wireless Video Transmission - allowing you to view, share, and manage live video with complete confidence and clarity.
The position is full-time (5 days a week) from our office in Ra'anana.

We are looking for a motivated Principal FPGA Engineer to join our team in Raanana.
You will have the chance to develop your own skills in a flexible and energetic work atmosphere with friendly and experienced colleagues. You will have helpful supervision, opportunity to learn, modern tools and flexible work culture.
If you want to be a part of our growing company that is driven by innovation and is focused on building a future together with our employees, consider applying.
Principle duties and responsibilities :
Design and develop FPGA/ASIC solutions across the full product lifecycle, including feasibility studies, architecture definition, implementation, verification, and production support
Work independently to deliver high-quality engineering solutions with minimal supervision.
Operate at the system architecture level across multiple design domains.
Serve as a Subject Matter Expert (SME) in one or more technical areas and provide consulting to other teams.
Lead and contribute to complex, high-impact projects critical to the business.
Integrate AI tools in FPGA/ASIC development process.
Mentor and provide technical guidance to junior and senior engineers.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.

We are looking for an Experienced HW SERDES Engineer to join Annapurnas SPIV (System Platform Interface validation) team.
As a member of the SPIV team, you will own End-to-end subset of system PCIe SERDES interfaces across range of products through product life cycle:
1. Validation and qualification.
2. Integration.
3. Deployment and post-deployment support.
4. Failure analysis.
5. Pre silicon activities for new technologies.
As owner, you will set the strategy for PCIe SERDES qualification over multiple platforms, ensure the design worked well and drive complex system debugs involving HW and FW components.

You will define NPI practices and engage in pre-silicon efforts to explore new technologies and mitigate integration risks. You will enhance SERDES qualification results with large scale customer performance analysis to discover SERDES life-cycle issues and mitigate them.

This is a fast-paced, intellectually challenging position, and you will work with thought leaders in multiple areas of technology. We are changing industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

Key job responsibilities
- Approve future products PCIe SERDES technologies.
- Define new products SERDES qualification and validation strategy and lead the execution.
- Engage integrations of Annapurna Labs products with other vendors PCIe HW components.
- Support ongoing integrations of PCIe SERDES in new products.
- Lead triage, PCIe SERDES debug and root cause analysis of systems in AWS data centers.
- Drive and maintain training, quality documentation and collateral to improve in-fleet operation.

our company Autonomous Driving software group is looking for a Linux kernel expert with deep knowledge in the PCIe standard. As a Linux Kernel PCIe Architect, you will be part of the OS Architecture team and will be responsible to define the operating system solutions based on the PCIe standard for connectivity with peripherals and as an interconnect between multiple EyeQ SoCs.
This is an exciting and unique opportunity to work with highly talented Linux OS architecture and developments teams and be a leader in the definition of the cutting-edge technology for the Automotive AI applications.
What will your job look like?
Researching and defining the SW solutions based on the PCIe standard and the Linux implementation for the PCIe stack
Designing and Implementing the SW Stack for the communication between the EyeQ SoCs laying the infrastructure for cross chip neural networks.
Defining the future HW solutions by working closely with the SoC Architecture team in a SW/HW co-development environment.
Performing performance analysis, feasibility studies, PoCs and optimization flows to achieve the highest performance with minimal resources.
Work closely with the Linux Kernel team and provide the technical guidance and mentoring for development engineers.

our company Autonomous Driving software group is looking for a Linux kernel expert with deep knowledge in the PCIe standard. As a Linux Kernel PCIe Architect, you will be part of the OS Architecture team and will be responsible to define the operating system solutions based on the PCIe standard for connectivity with peripherals and as an interconnect between multiple EyeQ SoCs.
This is an exciting and unique opportunity to work with highly talented Linux OS architecture and developments teams and be a leader in the definition of the cutting-edge technology for the Automotive AI applications.
What will your job look like?
Researching and defining the SW solutions based on the PCIe standard and the Linux implementation for the PCIe stack
Designing and Implementing the SW Stack for the communication between the EyeQ SoCs laying the infrastructure for cross chip neural networks.
Defining the future HW solutions by working closely with the SoC Architecture team in a SW/HW co-development environment.
Performing performance analysis, feasibility studies, PoCs and optimization flows to achieve the highest performance with minimal resources.
Work closely with the Linux Kernel team and provide the technical guidance and mentoring for development engineers.

This role has been designed as Hybrid with an expectation that you will work on average 2 days per week from our office.

Roles and Responsibilities:
Design, develop, and enhance I/O subsystems, virtualization, kernel programming, and memory management for cutting-edge system software products.
Drive performance optimization, and efficient memory management.
Perform in-depth debugging, triaging, and resolution of user and kernel-level, performance profiling, and memory-related issues.
Develop innovative solutions, addressing challenges in virtualization, multithreading, and hardware-software interaction.
Explore and implement new methodologies fostering continuous improvement and innovation.
Proactively identify bottlenecks in system design, and recommend and implement robust, scalable solutions.
Stay updated on evolving trends in kernel development, design, and virtualization technologies to bring innovative practices to the team.
Troubleshoot and optimize complex I/O and kernel features to enhance performance, scalability, and reliability.
Collaborate with cross-functional teams to align on design goals and ensure seamless integration with the system architecture.
Exhibit flexibility in taking on new or related tasks, showcasing adaptability and a proactive, problem-solving mindset.
Provide technical leadership in architecture design, problem-solving, and decision-making across complex technical domains.
Lead technical discussions, design reviews, and decisions on critical system challenges, driving the adoption of innovative solutions and best practices.

We're building the financial infrastructure that powers global innovation. With our cutting-edge suite of Embedded payments, cards, and lending solutions, we enable millions of businesses and consumers to transact seamlessly and securely. With 900+ employees worldwide and an R&D center of over 160 employees in Jerusalem - were reshaping how financial technology is developed and delivered..
The Role
We're looking for an experienced interdisciplinary product designer to join our Product Design team and assist with design efforts across our services: banking, card issuing, payments, merchant acquiring, loan origination, and more. This includes visual design and UI / UX for web-based banking and native apps ( Android, IOS ). In this role, you'll collaborate closely with designers, cross-functional partners, and engineers to craft product experiences of today and tomorrow. You'll work on the end-to-end design of new features and improvements across a range of products and help chart our course into the future as we evolve our technology, product, and design paradigms. Design plays a critical role here. You'll help build, iterate, and refine a high-quality User Experience that pushes the boundaries of what's possible. There's an opportunity to contribute to a variety of ways and shape the role to suit your unique mix of skills.
 
What Youll Actually Be Doing:
* Design and ship high-quality products and improvements, from early concepts to high-fidelity prototypes and visuals
* Partner closely with engineering, product management, AI research, and design peers to define both long-term strategy and short-term tactics
* Conduct user research to understand our users better and inform product decisions.
* Synthesize user and business insights to solve complex product challenges and improve design outcomes.
* A passion for turning complexity into usable, beautiful experiences.
* Integrate and use our design system to deliver product consistency and alignment
* Rapidly explore and prototype interactive concepts around emerging UX patterns and AI-ready design languages
* Deliver accessible, high-quality visual and interaction design from concept to completion that builds trust and showcases the power of our technology
Why Youll Love Working Here:
* Flexible hybrid work model: three days a week at our Jerusalem office
* Monthly wellness reimbursement - from therapy to gel manicure, it's up to you
* Full Keren Hishtalmut, private health and dental insurance
* Volunteer days, donation matching, Yoga and Pilates
* A supportive, collaborative culture that puts our people first

We build flexible, secure, and scalable payment solutions that improve cash flow and reduce friction in complex financial workflows.

Were looking for a Product Designer who brings strong craft, product intuition, and ownership. Youll take the lead on meaningful product areas, shape experiences end-to-end, and partner closely with Product and Engineering to deliver high-impact solutions.

Responsibilities
Own design for key product areas-from discovery to polished execution
Act as a thought partner in shaping product direction-not just executing on specs
Partner with Product Managers and Engineers to define problems, shape strategy, and deliver impactful solutions
Turn complex financial workflows (e.g. payments, reconciliation, approvals, credit flows) into simple, intuitive, and scalable experiences
Lead design processes including research, ideation, prototyping, and validation
Use qualitative and quantitative insights (user research, analytics, experiments) to guide decisions
Design with clear success metrics in mind (adoption, conversion, efficiency, revenue impact)
Create high-quality UX/UI deliverables: flows, wireframes, and high-fidelity designs
Contribute to and evolve our design system to support scalability across complex product surfaces
Work closely with engineering to ensure high-quality implementation and thoughtful trade-offs
Raise the bar for design quality through feedback, critique, and collaboration
Explore and integrate AI into product experiences and internal design workflows where it meaningfully improves outcomes