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25/02/2026
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
We are looking for exceptional software engineers to help develop the next generation chips based on a revolutionary architecture.
In this job you will design and develop software for functional and performance validation.

Key job responsibilities:
In this role you will develop system level software, targeting chip architecture, functional correctness and performance, running on various platforms and validating chip functionality.
Requirements:
Basic Qualifications
- Electrical/Computer Science engineer. Please include a grade sheet/academic transcript along with your CV in a single PDF when submitting your application.

Preferred Qualifications
- knowledge of object-oriented programming concepts.
- Experience in software development.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8560999
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our portfolio spans CPU, TPU, Networking and other key data center technologies, which power our company's most demanding Compute and AI/ML applications.
In this role, youll work to shape the future of strategic Data Center silicon. Youll be an early and key contributor in a nascent high-growth team that pushes boundaries, developing advanced custom IP and solutions. You will require expertise in one or more of the following areas: wireline communications, analog circuit design, Digital Signal Processor (DSP) design and algorithms, signal integrity, transmission line theory, advanced analog and mixed-signal modeling, high-speed clocking, Clock and Data Recovery (CDR), equalization, high-speed input/output (IO) industry standards. Your role has a significant component of cross-collaboration with a broad set of cross-functional organizations. You'll bring out the best in the team to deliver designs that serve many of our companys advanced data center products.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Architect and design high-speed analog/digital circuits (ADC, DAC, PLL, CDR, DSP), including optimizing for Power, Performance, and Area (PPA).
Model and simulate channel behavior (S-parameters), signal integrity, and jitter using tools like MATLAB.
Bring up new silicon, characterize performance, and test for electrical compliance in lab environments.
Work with packaging, board design, and firmware teams to ensure seamless integration into System-on-Chips (SoCs).
Adhere to standards like IEEE or OIF for high-speed protocols and optimize power consumption.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience in analog mixed signal or high-speed IO development.
Experience defining and taking to High Volume Manufacturing (HVM) leading edge mixed-signal or high-speed IO designs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on wireline silicon architecture and design.
Experience with technical innovation in mixed-signal and high-speed IO solutions.
Experience working on high-performance, data center class IP, from concept through high-volume deployment.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8544213
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Petah Tikva
Job Type: Full Time
join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF system -on-chip ( SOC ) products.
youll collaborate with internal teams and external osats to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
what will your job look like:
define and specify advanced package architectures for digital socs and RF ics in automotive applications.
perform substrate design for flip-chip bga (fc-bga) packages, including stack-up, routing, and ball-out optimizations.
evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
collaborate with osats to define and validate assembly materials and process flows.
work closely with internal teams such as backend, sipi, product engineering, and quality & reliability to ensure seamless integration.
monitor yield, quality, and manufacturability across package development and production stages.
support dfm reviews and ensure compliance with automotive standards and customer requirements.
Requirements:
all you need is:
b.sc. or m.sc. in electrical engineering, materials science, or a related field.
3+ years of experience in semiconductor package design and assembly.
deep knowledge of package design, substrate engineering, and simulation methodologies.
hands-on experience with package layout tools such as cadence allegro package designer or xpedition package designer.
solid understanding of high-speed layout constraints (e.g., crosstalk, emi, rfi) and proven experience with interfaces like ddr, pcie, mipi, and ufs.
strong background in schematic review, capture, and system -level integration.
proficiency in scripting for automation and design optimization with tools like matlab or Python - advantage.
proficiency in layout design verification tool such as cam350- advantage.
experience working directly with osats - advantage.
proven experience with sipi simulation tools like ansys siwave, ansys hfss, cadence sigrity and siemens hyperlynx - advantage.
proven experience with thermal or thermo-mechanical simulation tools like cadence celsius, ansys icepak, ansys mechanical and flotherm - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8579216
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
join our advanced packaging team to define and develop cutting-edge semiconductor package solutions for automotive-grade digital and RF system -on-chip ( SOC ) products.
youll collaborate with internal teams and external osats to deliver high-performance, manufacturable, and reliable packages that meet stringent automotive standards.
what will your job look like:
define and specify advanced package architectures for digital socs and RF ics in automotive applications.
perform substrate design for flip-chip bga (fc-bga) packages, including stack-up, routing, and ball-out optimizations.
evaluate and select substrate technologies, materials, and package solutions based on performance, cost, and reliability.
collaborate with osats to define and validate assembly materials and process flows.
work closely with internal teams such as backend, sipi, product engineering, and quality & reliability to ensure seamless integration.
monitor yield, quality, and manufacturability across package development and production stages.
support dfm reviews and ensure compliance with automotive standards and customer requirements.
Requirements:
all you need is:
b.sc. or m.sc. in electrical engineering, materials science, or a related field.
3+ years of experience in semiconductor package design and assembly.
deep knowledge of package design, substrate engineering, and simulation methodologies.
hands-on experience with package layout tools such as cadence allegro package designer or xpedition package designer.
solid understanding of high-speed layout constraints (e.g., crosstalk, emi, rfi) and proven experience with interfaces like ddr, pcie, mipi, and ufs.
strong background in schematic review, capture, and system -level integration.
proficiency in scripting for automation and design optimization with tools like matlab or Python - advantage.
proficiency in layout design verification tool such as cam350- advantage.
experience working directly with osats - advantage.
proven experience with sipi simulation tools like ansys siwave, ansys hfss, cadence sigrity and siemens hyperlynx - advantage.
proven experience with thermal or thermo-mechanical simulation tools like cadence celsius, ansys icepak, ansys mechanical and flotherm - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8579212
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving team behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHSIC Hardware Description Language (VHDL)), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience architecting networking ASICs from specification to production or equivalent experience.
Experience developing RTL for ASIC subsystems.
Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with design networking: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with software teams optimizing the hardware/software interface.
Experience in a procedural programming language (e.g., C++, Python, Go).
Knowledge of TCP, IP, Ethernet, PCIE and DRAM.
Familiarity with Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8544535
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v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
11/02/2026
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are seeking a Digital Electrical Design Engineer with extensive experience in board-level digital design, high-speed interfaces, and embedded systems. In this role, youll be a technical lighthouse within our Hardware R&D team-guiding complex, high-speed digital designs from concept through production. Youll collaborate closely with firmware engineers, system architects, and other cross-functional teams spread across multiple global sites. While prior quantum or cryogenic experience isnt required, an interest in learning about these cutting-edge fields is a plus.
Key Responsibilities:
Digital Board-Level Design: Architect, design, and implement advanced digital solutions involving FPGAs, microcontrollers, and high-speed communication interfaces (multi-GHz range).
High-Speed Signal Integrity: Develop and validate clocking solutions up to the tens of GHz range and handle GT lines to ensure robust, reliable performance.
End-to-End Development: Own the entire hardware lifecycle-from concept and schematic design in Altium to layout review, testing, and production release.
Design for Manufacturing & Test (DFM/DFT): Integrate manufacturing and testing considerations into your designs, collaborating with supply chain and production teams to ensure scalability and cost-effectiveness.
Technical Collaboration: Work closely with firmware engineers, system architects, and cross-site R&D teams to ensure seamless hardware-firmware integration.
Remote Coordination: Engage in significant remote collaboration with minimal travel, leveraging Agile and Kanban methodologies for project execution.
Subject Matter Expert: Serve as a go-to resource for digital design best practices, helping to maintain high engineering standards across the organization.
Requirements:
10+ years of hands-on experience in digital electronics design (board-level), focusing on FPGA-based systems, microcontroller integration, and/or high-speed communication.
Demonstrated expertise in high-speed signal integrity, including multi-GHz clocks and GT lines.
Proficiency with Altium or similar PCB design tools.
Understanding of Agile and/or Kanban methodologies in a hardware development context.
Proven track record of taking products from concept through production, including schematic design, layout oversight, and system bring-up.
Experience with DFM and DFT principles, plus involvement in supply chain and production processes.
Excellent communication skills in English, with the ability to collaborate across geographical boundaries.
B.Sc. or higher degree in Electrical Engineering or a related field.
Personal Attributes:
Passionate Technologist: Thrives on complex challenges and cutting-edge design work.
Team Player: Enjoys collaborating with global, cross-functional teams in a dynamic, fast-paced environment.
Independent & Proactive: Takes ownership of responsibilities, drives initiatives forward, and maintains a can-do attitude.
Adaptable: Comfortable with uncertainty and rapidly evolving priorities in a matrix organization.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8542199
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/02/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Senior ASIC Physical Design Engineer to join our dynamic team, Join the ride as we spearhead the next revolution in electronics!
What Youll Do
Own and continuously improve our smooth product backend integration methodology, flows, and best practices using Cadence and Synopsys tools.
Develop, maintain, and scale automation and infrastructure (TCL / Python) to improve quality, predictability, and turnaround time.
Collaborate closely with multiple teams to ensure smooth handoffs and high-quality product.
Support field teams on complex technical issues when needed.
Responsibilities
Implementation of ASIC units using advanced flows
Developing BackEnd methodology using Cadence and Synopsys tools
Build and develop scripts for physical design implementation
Support Field team with customer issues.
Requirements:
8+ years of hands-on experience with ASIC physical design (RTL-to-GDS).
Proven experience taking multiple full-chip SoCs from RTL through tapeout.
Deep knowledge of Cadence and/or Synopsys backend flows (experience with both is a strong plus).
Strong understanding of PnR, timing closure, SI, power, DRC/LVS, and signoff.
Excellent debugging and problem-solving skills.
Strong scripting skills in TCL and Python.
Nice-to-have / Advantage
Experience with multiple power domains and low-power design techniques.
Background that spans both frontend (RTL) and backend.
Experience influencing or defining methodology across teams or projects.
Personal skills
Innovation, quick learning abilities
Team player
Commitment, full ownership of tasks
Excellent communication and presentation skills
Customer orientation
A strong sense of ownership.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8560941
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/02/2026
Location: Haifa
Job Type: Full Time
We are looking for a Senior ASIC Physical Design Engineer to join our dynamic team, Join the ride as we spearhead the next revolution in electronics!
What Youll Do
Own and continuously improve our smooth product backend integration methodology, flows, and best practices using Cadence and Synopsys tools.
Develop, maintain, and scale automation and infrastructure (TCL / Python) to improve quality, predictability, and turnaround time.
Collaborate closely with multiple teams to ensure smooth handoffs and high-quality product.
Support field teams on complex technical issues when needed.
Responsibilities
Implementation of ASIC units using advanced flows
Developing BackEnd methodology using Cadence and Synopsys tools
Build and develop scripts for physical design implementation
Support Field team with customer issues.
Requirements:
8+ years of hands-on experience with ASIC physical design (RTL-to-GDS).
Proven experience taking multiple full-chip SoCs from RTL through tapeout.
Deep knowledge of Cadence and/or Synopsys backend flows (experience with both is a strong plus).
Strong understanding of PnR, timing closure, SI, power, DRC/LVS, and signoff.
Excellent debugging and problem-solving skills.
Strong scripting skills in TCL and Python.
Nice-to-have / Advantage
Experience with multiple power domains and low-power design techniques.
Background that spans both frontend (RTL) and backend.
Experience influencing or defining methodology across teams or projects.
Personal skills
Innovation, quick learning abilities
Team player
Commitment, full ownership of tasks
Excellent communication and presentation skills
Customer orientation
A strong sense of ownership.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8560949
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Hod Hasharon and Haifa
Job Type: Full Time
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
Requirements:
Solid understanding of general purpose CPU micro-architecture, including knowledge of areas such as processor pipelines, load store unit, caches, cache coherence, memory hierarchy, multi-processor, multi-thread processor systems.
Ability to make trade-offs between power, performance and area appropriately to meet the requirements of the product.
Hand-on experience with high power-efficient CPU core successfully.
Understanding of CPU instruction set architecture and assembly language.
At least 20 years of experience in one of the leading CPU companies
BSC, MS or PHD in Electrical Engineering, Computer Engineering, or Computer Science.
Familiarity with the ARM architecture and the micro-architecture for current ARM CPU cores.
Software development (C, assembly).
Experience modeling microprocessors using higher-level languages, like C/C++.
Excellent verbal and written communication skills.
QUALIFICATIONS
Co-operate and communicate well with the architecture team and other members of development team.
Interact with the Product System architects, software teams and ASIC chip teams to define the overall architecture of the Processor ASIC including memory hierarchy.
Travel to Beijing and ShenZhen sites may be required.
Good presentation and internal customer interaction skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8550290
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
As part of the Architecture team, you will:
Directs, leads, and manages the technical activities of a hardware development function for electronic design, mechanical design and/or hardware reliability.
Directs, leads, and manages the technical activities of a software development function for software systems, applications and/or software quality assurance.
Directs, leads, and manages the technical activities of an integrated hardware/software systems design function.
Define device specifications and architectural features for next-generation networking silicon.
Design and implement logic and software solutions that meet performance, power, and scalability requirements.
Develop software components in C++ as part of the silicon architecture and enablement flow.
Collaborate closely with design, verification, and software teams to translate specifications into working silicon.
Contribute to the development of a unified and programmable silicon architecture enabling AI-driven networks.
Take part in shaping our products that power the Internet of the future.
Requirements:
Minimum Qualifications:
Team management experience.
B.Sc. in Electrical Engineering or computer science.
5+ years of technical experience in a large corporate environment.
Strong background in logic design and system-level architecture.
Software engineering experience in C++.
Solid understanding of networking principles and protocols.

Preferred Qualifications:
Experience with ASIC-related software such as SDKs, firmware, or low-level system software.
Hands-on experience in ASIC development (architecture, design, or verification).
Proficiency in Python.
Ability to quickly learn new technologies and complex systems.
Strong technical documentation and presentation skills.
High attention to detail and a system-level mindset for networking solutions.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8546140
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
11/02/2026
Location: Ra'anana and Yokne`am
Job Type: Full Time
What youll be doing:
Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.
Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.
You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.
Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.
Requirements:
What we need to see:
B.Sc. in Electronic Engineer degree or equivalent experience.
5+ years of experience in high-speed design.
Having a detailed knowledge of circuit design and consideration for layout, routing, and timing constraints, DFM, DFA, DFT constraints in volume manufacturing is needed for this role.
Be an authority in using Cadence Allegro PCB design tools.
Have a deep understanding of High-Density Interconnect PCB layout and PCB Signal Integrity.
Knowledge in PCB manufacturing processes for HDI, Standard Thru-Hole, and Back-drilling.
Proven ability to work with a team while taking personal responsibility for your own contributions.
Agility in changing focus as the needs of our effort evolve.
Strong leadership, communication, and presentation abilities.

Ways to stand out from the crowd:
Experience in crafting PCBs in the 25gbps + range using back-drilling technology.
Designing sophisticated multi-layer HDI PCB's for very dense placement and routing is helpful.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8542235
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
Were looking for a Head of Design to lead our growing Product Design team and help define the future of our product experience. As a senior leader, reporting to the CPO, you will shape the vision, strategy, and operational approach for product design across our product, infusing world-class UX craft and cross-functional collaboration. Youll guide a high-performing team of designers and design managers, ensuring our solutions are delightful, intuitive, and empowering to our users.
Beyond leading Product Design, you will also own our brand expression and visual identity, and lead the Marketing Design function that brings our brand to life across marketing assets and campaigns-working in close partnership with the Creative team, who owns campaign concepts and creative strategy.
We are redefining how small-business owners run their companies through AI. Not by sprinkling isolated smart features across the product, but by building a true AI Business Partner. Think of it as an AI Super-Agent: a conversational ally (voice and text) paired with dynamic, generative UI that delivers instant visibility, actionable insights, continuous learning, and hands-on control. Creating this next-generation SaaS paradigm demands bold, system-level design thinking- exactly where our Head of Product Design will lead the charge.
This is a unique opportunity to impact a beloved product with a strong brand and a deeply engaged user base, while scaling design excellence in a fast-paced, AI-enhanced environment.
Here are a few of the things you'll do:
Own and drive the end-to-end product design vision across all user-facing experiences.
Inspire, coach, and manage a multidisciplinary design team, including design leads and ICs, fostering a culture of creativity, critique, and growth.
Collaborate with Product, Engineering, and Data leadership to shape product strategy, ensuring design thinking is central from discovery to delivery.
Build and scale design systems and tooling to ensure consistency, quality, and efficiency across teams.
Collaborate with our Marketing team, specifically with the Creative team, making sure our brand is reflected in the product and in our marketing assets in an effective and consistent way.
Champion the voice of the user-combining qualitative research, UX best practices, and business context to inform decisions.
Recruit, hire, and onboard top-tier design talent to support our continued growth.
Elevate design as a strategic function, helping articulate how product experiences tie into our business outcomes.
Requirements:
10+ years of experience in product design, including 3+ years managing design leaders.
A proven track record of shipping exceptional, user-centered products in high-growth startups.
Deep understanding of interaction design, visual design, and UX research, alongside a sharp product and business sense.
A thoughtful approach to design leadership: empowering teams and holding a high craft bar.
Experience leading brand expression, visual identity, and marketing design (graphic design for campaigns, landing pages, and marketing assets).
Experience collaborating with executive stakeholders and cross-functional teams in complex, high-growth environments.
A portfolio or body of work that shows how your leadership translated to real product impact.
Experience working in AI-enhanced product environments is a strong plus.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8567754
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
11/02/2026
Location: Yokne`am
Job Type: Full Time
We are looking for Board Design Team Lead to join our Hardware team.
Roles and Responsibilities:
Lead and manage the Board Design team, including setting priorities, overseeing project execution, and ensuring high-quality deliverables across multiple hardware projects
Definition, design, and production of Chain Reaction reference designs and internal prototyping and evaluation HW
Product specifications
Electrical schematics
Component selection
Layout guidance
Hands-on development and testing in a lab environment
Accompanying production and qualification processes
Requirements:
Minimum 2 years of experience in leading and managing engineering teams
B.Sc/M.Sc in Electrical Engineering
7+ years experience as Board Designer
Experience in layout, design bring-up and verification.
Strong communication and interpersonal skills
Preferred
Experience in high power designs
Experience in control interfaces (e.g. PCIe, parallel and serial I/Fs )
Experience in memory devices designs (e.g. DRAM memories like DDR3/4)
Experience in production of boards/systems
Ability to independently learn, investigate and implement new technologies
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8541502
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תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/02/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
Senior Board Design engineer We are seeking a Senior Board Design engineer with strong board-design expertise, a multidisciplinary background, and a proactive, hands-on approach to join our hardware team. In this role, you will be part of our R&D efforts, leading the development and enhancement of complex hardware systems-from concept and architecture through design, validation, and transition to serial production. If you are creative, open-minded, a strong team player, and eager to contribute to innovative technologies shaping the future battlefield, we would be excited to meet you.
Requirements:
integration processes. Requirements:
B.Sc. in Electronics Engineering.
7+ years of proven experience as a board designer.
Hands-on experience with high-density mixed-signal designs, including charger circuits, digital/analog components, Ethernet, RF datalinks, and CPU communication interfaces.
Strong capability in hardware failure analysis and delivering both short- and long-term corrective solutions.
Experience leading products from concept through serial production.
Experience working with subcontractors.
Background in multidisciplinary product development-drones, robotics, or aeronautics is an advantage.
A can-do attitude, strong problem-solving skills, and the ability to work independently as well as in a team.
Creative, organized, and able to think outside the box.
Experience in the defense industry-advantage
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8421441
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Haifa
Job Type: Full Time
which department will you join?
epg is a fast-paced, dynamic, and startup-like group responsible for researching, incubating and developing next-generation technologies and ideas, with a strong orientation towards computer vision, Machine Learning, data, and ai.
the group hosts a diverse team of scientists, engineers and developers to research, realize, and bring to market innovative new products, leveraging cutting-edge technologies, skills and capabilities.
were looking for a backend expert to join the growing physical design team, responsible for state of the art SOC design from definition to tape-out.
what will your job look like:
hands-on physical design block owner from rtl to gds.
floorplan exploration with guidance and collaboration with Front-End and architecture teams.
sta: work with fe and floor planner to manage block and top level constraints and 1st level of timing analysis.
synthesis exploration and final synthesis netlist: scan insertion @ synthesis, clean checks from lint, upf & spyglass.
place & route: from synthesis netlist to final layout and signoff verification with target to achieve best power performance and area.
Requirements:
all you need is:
bsc or msc degree in computer engineering or electrical engineering.
3+ years experience in the physical design field
experience in scripting languages like tcl/ Python / PERL /tcsh.
team player with excellent communication skills, customer orientation, and a can-do attitude.
experience in relevant domains - advantage.
building or maintaining implementation tools and flow - advantage.
We change the way we drive, from preventing accidents to semi and fully autonomous vehicles. if you are an excellent, bright, hands-on person with a passion to make a difference come to lead the revolution!
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8578848
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