לוח משרות דרושים, לחיפוש זה נמצאו 501 משרות

we are looking to hire a talented VLSI Design Engineer to join our VLSI group in Tel Aviv.
You will work alongside other talented engineers to develop our cutting-edge AI chips.
If you are motivated and skilled in VLSI and excited about AI, we want to meet you!
Responsibilities:
Bring architecture requirements of AI Chips to a power and area efficient VLSI implementation with the right performance.
Work along with verification to enable a fully functional design.
Work along with backend and DFT to converge the design into silicon.
Join the bring up of the features with SW when silicon is back in lab and the magic happens.

we're seeking a visionary Staff Physical STA Expert to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the sign-off methodology for chips that power the world's most advanced AI clusters.

As a Staff Physical STA Expert , you will hold the keys to silicon success. You will be leading the STA activities end-to-end from Chip partition, Time budgeting through signoff of all the chips we develop. You will build and lead the STA team to run several chips signoffs in parallel. In addition, You will define the sign-off methodology for chips that power the worlds most advanced AI clusters. You will act as the central nervous system of the design process, bridging the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.

Key Responsibilities

Take full ownership of the STA flow and sign-off methodologies. You will establish the rigorous criteria that ensure our products succeed in the most demanding data center environments
Collaborate closely with Architecture, Design, DFT, and Backend teams. You will lead timing reviews and work closely with block owners to navigate the path to sign-off convergence
Develop, optimize, and manage complex SDC constraints from the ground up, ensuring they are robust across multi-scenario environments
Tackle the challenges of cross-chip clock distribution networks and sophisticated margining techniques, ensuring robust silicon across all process corners
Have a passion for better workflows? Youll participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and in-house automation to make our sign-off process faster and smarter

In this role you will develop system level software, targeting chip architecture, functional correctness and performance, running on various platforms and validating chip functionality.

we're seeking a visionary Design Verification Student to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, designing complex solutions that sit at the heart of our most ambitious connectivity projects.

As a Design Verification Student, you will be at the forefront of quality, learning how to ensure that the chips powering the world's largest AI clusters are bug-free and robust.
This isn't just about running tests - its an opportunity to learn advanced verification methodologies (UVM/SystemVerilog) alongside world-class engineers. You will support the development of sophisticated testbenches and help verify high-performance digital blocks that sit at the heart of AI infrastructure.



Key Responsibilities


Assist in building and maintaining System Verilog/UVM-based testbenches, including monitors, checkers, and functional coverage models
Run simulations, analyze failures, and work with the design team to debug and resolve RTL issues
Help define and implement functional coverage and assertions to ensure all "corner cases" of the design are tested
Utilize and improve scripting (Python/Tcl) to streamline verification flows and result reporting
Partner with Design Engineers to understand block specifications and ensure the verification plan matches the design intent

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the company-Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.
Responsibilities
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

we are looking for a talented Hardware Engineer to join our development team. If you enjoy designing complex electronic boards, solving real-world system challenges, and working on cutting-edge defense technologies, we would love to hear from you.
Responsibilities:

* Design and develop electronic boards and system hardware architecture.
* Lead the full product lifecycle: concept, schematic, layout guidance, bring-up, and production.
* Collaborate with cross-functional teams (software, mechanical, system, and integration).
* Work with subcontractors and support performance analysis.
* Participate in design reviews, system validation, and field testing.
* Support the transition from development to manufacturing.

Designs and develops integrated circuits. Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use. Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development.
- Knowledge: Having wide-ranging experience, uses professional concepts and company objectives to resolve complex issues in creative and effective ways.
Strong project management skills
Leads design and delivery of new
products/process
Functional breadth and depth, plus expert in complementary fields
Applies broad concepts and theories to achieve innovative and effective solutions to complex problems - Job Complexity / Contribution : Works on complex issues where analysis of situations or data requires an in-depth evaluation of variable factors. Exercises judgment in selecting methods, techniques and evaluation criteria for obtaining results. Networks with key contacts outside own area of expertise.
Will champion significant projects, programs and business initiatives using demonstrated creativity and ingenuity
Team leader
Leads major projects
Influences or impacts others'
priorities, decisions or activities
Escalation point for complex issues
Coaches and mentors other junior team members - Supervision : Incumbents provide a leadership role for the work group through knowledge in his/her area of specialization. Generally free to determine work priorities based on general direction from managers.
Determines methods and procedures on new assignments
Consults with management on long-range goals
Determines own priorities, both tactical and strategic

Required PHY System Technical Leader
Job Description
Join the PHY system team at Silicon One, a pivotal part of our silicon development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
Key responsibilities include:
Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.
What Youll Do:
Youll be part of the group driving next-generation network devices-Silicon One-within a startup-like atmosphere inside a well-established, leading corporation.
Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are a global leader in high-performance smart energy technology, with over 3000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery Storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. The Role: We are searching for a highly skilled PCB Layout team leader to take the helm of our core Layout Design group. This is a hands-on leadership role (~50% design, ~50% leadership) that requires a unique blend of technical mastery and managerial excellence. You will be responsible for balancing team capacity, driving workflow improvements, and acting as a professional technical authority for the layout of our most advanced solar and energy Storage products. This role offers a significant opportunity to influence company-wide PCB layout methodology, update design standards, and directly shape our 2026 operational excellence roadmap. What you will do: Managerial Responsibilities:
* Lead and manage the internal PCB Layout team (resource allocation, mentoring, load-balancing) to support major A1 R&D projects like Optimizers, Inverters, and Storage.
* Oversee the teams Jira ticketing system, utilizing Managerial Visibility Dashboards and RAG (Red/Amber/Green) statuses to track workflow bottlenecks, manage delays, and enforce structured data entry.
* Serve as the primary interface between the Layout team and external departments, including Hardware Directors, Mechanical Engineering, Q&R, and external PCB manufacturing factories.
* Matrix-manage and assign tasks to external/global layout resources (such as our India team and outsource bureaus like Mindboard), ensuring smooth communication and delivery. Professional & Technical Responsibilities:
* Act as the technical authority for the department, leading complex design reviews, pre-completion checks, and making key technical tradeoffs (stack-up, routing strategies, SI/PI).
* Own and aggressively update internal layout methodologies.
* Provide professional mentorship and training to layout editors, actively stepping in to unblock technical challenges and executing complex layouts yourself.
* Resolve complex cross-departmental technical issues, such as mechanical 3D transfer conflicts, strict High-Voltage (HV) spacing rules, EMI/EMC mitigation, and advanced manufacturing capabilities (press-fit components, robotic soldering).
 
Country:
Israel
City:
Herzliya

We develop cutting-edge technology in Silicon Photonics, revolutionizing connectivity and communication in data centres. Silicon photonics is becoming a standard technology used for high-performance systems, solving challenges of performance, integration, power and cost. This technology is growing rapidly also in other markets such as Healthcare, LIDARs and other sensors. We are looking to solve difficult problems, smartly and simply, by thinking out of the box, leveraging the knowledge and know-how of the team members and working as a team to create Magic. Our Company culture is characterized by accountability for our ethics and for being fair to every employee, customer, supplier, and partner. We believe we must work hard and have fun on the way to success. We are looking for a Photonics Layout Engineer to join our integrated photonics design team. This position is also well-suited for Analog Layout Engineers who are interested in transitioning into photonic integrated circuit (PIC) design. In this role, you will be responsible for creating, optimizing and validating PIC layouts, ensuring manufacturability, performance and compliance with foundry design rules. You will work closely with device designers, process engineers and tape-out teams to deliver high-quality layouts of silicon photonics PICs. Strong candidates will have hands-on experience with industry-standard layout tools, especially Cadence Virtuoso or similar software. Understanding of photonic components, waveguide routing and automated layout generation is a major advantage. You will also contribute to layout methodologies, PCells, and design automation flows to accelerate PIC development.
Responsibilities:
o Develop and implement mask layouts for photonic integrated circuits using Cadence Virtuoso or similar software. o Create and maintain PCells for photonic building blocks (waveguides, couplers, modulators, gratings, etc.). o Perform waveguide routing, ensuring correct connectivity, bend radius limits, and low-loss optical paths. o Verify layouts using DRC, and LVS to ensure compliance with foundry requirements. o Collaborate with device designers to translate basic schematics and specifications into Software schematics and manufacturable layouts. o Optimize layouts for performance, yield, and compactness while adhering to technology constraints. o Participate in photonic design automation tool development and workflow improvements. o Prepare and manage data for tape-out and support mask review processes. o Debug layout and rule-check issues and propose corrective actions.

We are looking for a Senior PCB Design layout Engineer to join our Hardware engineering team at the Autonomous Vehicle Platform department as a key player in the development of next-generation ECU (electrical control unit) for autonomous vehicles.
What will your job look like?
Working closely with hardware and mechanical design engineers, you'll perform PCB layout our company's ECUs and other products.
Complete development of CAD layout from footprint definition, detailed component placement, constraints management, with a concept of topology and signal and power integrity.
Be responsible for the design releases required generation of artwork files, ODB++, FAB drawings, ICT report, and electronic PCB documentation.
Your designs will need to follow IPC class 3 , signal and power integrity constraints, EMI/RFI control and automotive regulations.

our company, a Sisram Medical company, is a global leader in medical-aesthetic technologies, with over 25 years of experience in energy-based devices (EBD). Over the years, our company has evolved into an integrated aesthetic and wellness ecosystem that combines medical devices, injectables, diagnostics, and personalized skincare. The company operates in a dynamic, innovation-driven environment, merging advanced technology with deep clinical understanding to create holistic solutions for aesthetic clinics. our companys headquarters are in Caesarea, Israel, with business operations in more than 100 countries worldwide.
* Strategic direction and leadership across Mechanical Engineering, Electronics, and NPI teams
* Drive end-to-end development processes for new products, from concept through commercialization
* Ensure delivery against development goals, timelines, and quality standards
* Push and motivate cross-functional teams to meet business and technical objectives
* Collaborate closely with multiple stakeholders, including V&V, Software, Regulatory, Quality, and Innovation
* Lead engineering activities in compliance with stringent regulatory requirements
* Support maintenance and continuous improvement of existing products, including addressing field-related challenges
* Continuously improving development processes, methodologies, and strategies

> Design and development of complex anlog & digital boards for Motion Control applications > Participate in the architecture design of future applications and products > Support existing designs, implement changes and reliability improvement enhancements, test and validate new designs Primary Duties and Responsibilities > Design and develop complex boards > Define Requirements, engineering specs and Validation documents > Select major components, lead layout and placement using contractors > Perform Bring-Up tasks, validate design, support transition to manufacturing, support the boards in their life cycle

Our Physical Design group operates in a dynamic, startup-like environment that values deep technical expertise and high-level execution. Each engineer holds end-to-end responsibility - from initial definition and constraints development to execution and full signoff. You will work closely with Design and Architecture teams on RTL modifications and design reviews to ensure seamless convergence.
Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).

We're hiring a Director of Product Design to own the craft and quality bar across product experiences and go-to-market surfaces. Reporting to the VP of Product Design, you'll be a hands-on design leader, keeping UI quality, UX patterns, and brand cohesion consistent as we scale across a B2B2C portfolio that spans a connected device, AI features, and behavior change.
You'll directly shape our highest-stakes launches and executive storytelling, push AI-forward design workflows, and tighten collaboration with Engineering, without compromising trust, privacy, or accessibility.
Responsibilities:
Contribute to the "AI-first" product design vision: Establish UX patterns for AI-driven product experiences, while architecting internal frameworks and using generative tools to accelerate the entire product design lifecycle
Uphold the visual quality bar across product lines and go-to-market by being hands-on on the highest-stakes work: directly designing key launch moments, executive storytelling assets, and solutions to complex visual and interaction problems, with consistent brand expression across the portfolio.
Define and maintain cross-product UX patterns and layout guardrails: navigation, data presentation, key screens, and visual style, without adding process overhead.
Act as a craft delegate to the VP of Product Design, running critiques and first-pass reviews, surfacing risks early, and accelerating decisions.
Coach designers and writers through pragmatic, high-signal feedback, with a focus on user understanding, trust, and actionability for people managing heart health.
Support hiring, portfolio calibration, and selective external representation to reinforce our quality bar and attract people excited by AI, hardware, and health outcomes.