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Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Senior Design Verification Engineer, you will be a part of Research and Development team to verify digital designs, develop constrained-random test environments and drive system testing to closure. You will collaborate with design and verification teams, manage the verification life-cycle and uncover bugs through corner-case testing.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving team behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop and refine random verification environments using SystemVerilog/UVM or Specman to ensure effective test coverage.
Define and implement various coverage measures to capture stimulus and corner-case scenarios.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out.

as a quality and reliability (q&r) engineer, you will lead the qualification and long-term reliability of advanced system -on-chip ( SOC ) and RF semiconductor products for automotive applications. youll work across digital and RF domains to ensure robust performance and compliance with industry standards. what will your job look like:
define and manage quality and reliability specifications, simulations, and qualification plans for SOC and RF die and package.
plan and execute automotive-grade qualifications per standards such as aec-q100, jedec jesd22, and iatf 16949.
design and implement die-level and package-level stress tests.
select and prepare electrical, environmental, and mechanical TEST platforms for reliability testing.
define requirements for pre-si q&r (e.g. esd, lu, em, ir drop), design-for- TEST (dft), electrical characterization, and post-si q&r testing of digital, mixed-signal and RF socs.
collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (osats).
lead failure analysis, reliability modeling, and corrective action processes (e.g., 8d, fmea, fmeda).
document and certify automotive standards compliance, including ppap/apqp deliverables.

as a quality and reliability (q&r) engineer, you will lead the qualification and long-term reliability of advanced system -on-chip ( SOC ) and RF semiconductor products for automotive applications. youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
what will your job look like:
define and manage quality and reliability specifications, simulations, and qualification plans for SOC and RF die and package.
plan and execute automotive-grade qualifications per standards such as aec-q100, jedec jesd22, and iatf 16949.
design and implement die-level and package-level stress tests.
select and prepare electrical, environmental, and mechanical TEST platforms for reliability testing.
define requirements for pre-si q&r (e.g. esd, lu, em, ir drop), design-for- TEST (dft), electrical characterization, and post-si q&r testing of digital, mixed-signal and RF socs.
collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (osats).
lead failure analysis, reliability modeling, and corrective action processes (e.g., 8d, fmea, fmeda).
document and certify automotive standards compliance, including ppap/apqp deliverables.

We are looking for outstanding STA (Static Timing Analysis) Physical Design Engineers to join our remarkable Networking team in Israel. Our team focuses on building the industry's top high-speed communication devices, providing the highest efficiency and minimal latency. As part of NVIDIA, you'll be working in a meaningful, growing, and highly professional environment where your contributions make a significant impact. If you are ambitious, innovative, and ready to compete on the cutting edge of technology, this is the perfect opportunity for you!

What you'll be doing:

Perform advanced Static Timing Analysis (STA) at a chiplet and FC level.

Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.

Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.

Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.

we are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!

Do you want to help accelerate the networking solution across NVIDIA's product portfolio? NVIDIA Co-packaged silicon-photonics group seeks a dedicated R&D system engineer to join our silicon-photonics testing platforms team. We seek a skilled and experienced systems engineer to join our team.

The ideal candidate will have experience in these topics: high-speed testing of fiber-optic modules for telecom/datacom, lasers, and post-silicon verification. In this role, you will lead the design, Integration, and deployment of electro-optical testing platforms for SiPh. You will work closely with the R&D teams, internal verification teams, architects, FW developers, market-leading subcontractors, and other stakeholders to design systems. This role requires hands-on experience and a deep system-level multidisciplinary understanding of high-speed transceivers, as well as excellent integration, problem-solving skills, and strong communication abilities.

What youll be doing:

You will lead the design of testing setups for bringing up and testing the new SiPh transceiver chips.

Provide technical support and assistance to manufacturers of silicon photonics testing platforms.

Troubleshoot and diagnose technical issues related to equipment, processes, and software.

Document experimental procedures, results, and findings accurately and comprehensively.

Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.

We are looking for a creative and independent Senior Test Engineer. NVIDIA Networking unit has continuously reinvented itself over two decades. Our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, NVIDIA is increasingly known as the place for getting End-to-End High-Speed Ethernet and InfiniBand Solutions We're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. We need a creative individual who will help transfer Network Silicon ICs products (Switch, NIC, SmartNic) from design engineering to mass production.

You will be exposed to various aspects of design, DFT and test of NVIDIA network IC products, and will be responsible for definition and development of tests from wafer level to final test of Network-ICs. In addition, your responsibilities will include working with overseas manufacturing teams to increase yields, test coverage and capacity, and reduce production costs. If you are passionate about enabling of the highest quality Network products that will change the world, we want to hear from you!

What you'll be doing:

IC Test definition & development.

Write, execute and debug FW code.

Manage Failure Analysis of field and production failures.

Provide DFT recommendations to the design teams.

Build expertise on production of network products.

In this role, you will conduct Place and Route experiments and sensitivity analyses to influence standard cell library architecture, metal stack definitions, and design rules. You will collaborate with Foundry, IP, and Architecture teams to identify Power, Performance, and Area (PPA) bottlenecks and drive System Technology Co-Optimization (STCO) initiatives.
Your work will involve performing high-fidelity physical implementation sweeps, analyzing the impact of scaling boosters, and developing automated methodologies to quantify PPA gains. By navigating the trade-offs between process complexity and design performance, you will ensure our companys hardware achieves efficiency and power density.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute high-fidelity Place and Route experiments to evaluate the PPA impact of advanced process features, library architectures, and design rule variations on datacenter-class IP.
Drive Design Technology Co-Optimization by collaborating with foundries and internal technology teams to define optimal metal stacks, track heights, and scaling boosters (e.g., backside power delivery, buried power rails).
Quantify process entitlement through systematic benchmarking of logic and memory macros, identifying bottlenecks in power density and timing closure for next-generation nodes.
Develop automated physical design methodologies and flows to accelerate technology pathfinding and enable rapid what-if analysis of emerging transistor architectures.
Influence System Technology Co-Optimization by partnering with Hardware Architects and Circuit Designers to translate process-level innovations into system-level performance gains.

Join the Front-End Design Verification team, responsible for validating the most advanced networking silicon in the world. Our team ensures functional correctness, quality, and reliability across the entire design flow. We combine state-of-the-art methodologies with a collaborative, startup-like culture, while being backed by the stability and resources of us.

Your Impact:
Develop advanced verification environments using SystemVerilog and UVM.
Write, run, and debug testbenches to ensure complete functional coverage.
Drive pre-silicon and in-lab debug activities to resolve complex issues.
Collaborate with RTL, architecture, and physical design teams to achieve design closure.
Support methodology development, scripting, and automation to enhance productivity.
Contribute to the success of us, powering the next generation of Internet infrastructure.

We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Learning system and SW requirements for proper implementation of HW-SW interface
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation).

We are seeking a Technical Project Manager with proven expertise in High-Speed Board Design and hardware project management to join our Firewall Core Group. This role involves leading complex, cross-functional projects that combine hardware and software, driving innovation for our company Security Gateways.
Key Responsibilities
Lead hardware/software projects from planning through delivery.
Manage board design, hardware development, and prototype builds (EVT, DVT, PVT) with contract manufacturers.
Coordinate across R&D, QA, PMO, and Product Management teams.
Oversee software release processes and infrastructure changes.
Maintain schedules, mitigate risks, and manage external vendors.

What Youll Be Doing
Lead the entire Product Design org, managing four Product Designers and one Content Writer while partnering closely with Product, Engineering, and Research.
Own our companys UX strategy, vision, and north-star experience, setting a clear long-term direction for a complex enterprise product with multiple modules and workflows.
Build, evolve, and govern our companys design system, UX patterns, and quality standards, ensuring a coherent and modern product experience across all surfaces.
Partner with Product leadership to drive PLG-focused UX, improving onboarding, activation, time-to-value, and the full self-serve experience.
Develop a deep understanding of our companys user persona - IT teams with complex workflows - and translate that understanding into high-impact UX improvements across the product.
Work closely with Product, Engineering, and other cross-functional leaders to prioritize UX investments, influence product strategy, and ensure design impact on key user and business outcomes.
Mentor, coach, and grow designers at all levels, building a high-performing, collaborative, user-centered design culture.
Establish and evolve clear design processes, reviews, and research rituals to support quality, alignment, and fast learning cycles.
Balance strategic vision with hands-on leadership, ensuring the team executes with clarity, craft, and measurable impact.

Were looking for a passionate, creative, and highly motivated Product Designer to join our Mobile and Web Product teams. The team is responsible for all aspects of product development for the Rider, Driver Apps, and Business platform, used by millions of users globally.
As a product designer, you will be involved in all the development aspects of our wide range of products and features: from the initial research, user-journey design, wireframing, and prototyping to the launch and beyond. Youll be collaborating with other product designers, product managers, and engineers.
We expect you to be:
Owner of the product's overall look and feel.
Product thinker - identifying and understanding users needs and new opportunities derived from them.
Problem solver - taking complex problems and coming up with well-researched and elegant solutions based on the use of UX methodology.
Data-driven designer - making design decisions based on data, user behavior, and measurable outcomes to ensure impact and continuous improvement.
Pixel-perfect freak - compromising on the smallest details.
Team player - demonstrating great interpersonal skills while interacting with the product managers R&D teams and other stakeholders.
Fast learner - evolving fast, while being capable of learning from both success and failure.

Were on a mission to revolutionize our industry by automating everything but holding the wrench, providing our users with smart, AI-powered tools that will replace time-consuming tasks, generate more revenue, and provide peace of mind, freeing our users to focus on building their small business into an empire.

Who are you?

You are a forward-thinking design leader who recognizes that the landscape of product design is rapidly evolving. You dont just see the AI revolution as a trend; you view it as a mandate to reimagine the workflow between Design, Product, and R&D. Part innovator, part tinkerer, and part growth hacker, you stay at the forefront of design technology, constantly exploring new AI tools and methodologies to challenge the status quo and build something better.

At your core, you are a top-notch UX/UI designer with an expert ability to craft clear, intuitive, and beautiful user experiences. You are passionate about accelerating our pace, leveraging AI to create efficiencies that streamline the way we work and build.

While you have the leadership experience to manage and scale a team, you remain a builder at heart. You thrive in a hybrid role, balancing team leadership with the direct execution of key design initiatives as an individual contributor.

To apply, we require candidates to have an up-to-date online portfolio showcasing their recent work.

So, what will you be doing all day?

Lead and manage a small, high-performing design team, overseeing their professional development and day-to-day alignment with our product vision.
Partner across Design, Product, and R&D to transform how we work together, implementing modern, AI-augmented methodologies and automation to bridge the gap between concept and code
Directly own and drive major design projects as an individual contributor, collaborating seamlessly with colleagues from different teams (product, design, development, QA, and BI)
Apply a comprehensive understanding of a product's lifecycle, from research and prototyping to design and usability testing
Contribute as a member of the design team and promote winning ideas and decisions

our radar team develops cutting-edge radar technology for autonomous driving (av) and advanced driver-assistance systems (adas). we are looking for a Cyber security architect to lead the design and implementation of robust security solutions that protect our radar systems from cyber threats.
in this role, you will define security architecture for radar hardware, Embedded software, and communication interfaces, ensuring compliance with automotive cybersecurity standards and safeguarding mobileyes mission-critical sensing technology.
youll be part of a team shaping the future of autonomous driving. our radar technology is a critical component in delivering safe, reliable, and intelligent mobility solutions. youll work on innovative projects in a collaborative environment, with the opportunity to influence security strategy at a global scale. what will your job look like?
security architecture design - develop and maintain end-to-end security architecture for radar systems, including hardware, firmware, and software components.
threat modeling & risk assessment (tara) - perform threat analysis and risk assessment for radar components, software modules, and communication channels; identify vulnerabilities and design mitigation strategies.
secure communication - implement encryption, authentication, and integrity checks for radar data transmission between hardware and software layers.
secure software design - define and enforce security controls for apis, middleware, and integration points between radar systems and other vehicle subsystems.
compliance & standards - ensure radar systems meet iso 21434, unece wp.29, and other relevant automotive cybersecurity regulations.
collaboration with r&d - work closely with radar engineers, Embedded software developers, and system architects to embed security into the design process.
incident response support - provide architectural guidance during security incidents involving radar systems.
technology evaluation - assess and recommend security tools, frameworks, and methodologies for radar-specific applications.