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As the Silicon Engineering Manager you will be responsible for improving silicon-photonics yield and performance through data-driven analysis, cross-functional collaboration and proactive issue resolution.

You will serve as the key interface between R&D, Process and Production teams, ensuring efficient data flow, rapid issue identification and continuous process improvement across wafer fabrication, device testing, and packaging stages.

Responsibilities:
Perform silicon process and chip-level data analysis, establishing correlation between chip and wafer performance.
Lead process debug and yield loss analysis at chip/wafer level, driving root cause investigations and corrective actions.
Manage engineering approval forum to release production material.
Collaborate closely with vendors to implement new product tests and resolve technical/process issues.
Act as a key interface between design, testing, and production teams, ensuring alignment across the product lifecycle
Oversee and coordinate the transfer of data related to silicon design, testing, fabrication, and characterization between Production and R&D departments.
Develop and implement data management strategies to ensure data accuracy, security, and accessibility.
Maintain proper documentation of data transfer protocols, version control, and data integrity checks.
Support data analysis efforts to improve silicon performance, yield, and quality.
Ensure compliance with company policies and industry standards related to data security and confidentiality.

We are seeking a talented and motivated R&D Physicist to join our company.

In this role, you will be responsible for designing and carrying out experiments for SiPh chip performance and characterization, performing and analyzing laboratory experiments of chip level optical systems assembly, and developing and managing setups for photonics and laser devices characterization. In this roll you will be required to travel abroad for demonstrations and exhibitions as needed.

Responsibilities:
Design and carry out experiments for SiPh chip performance and characterization.
Perform and analyze laboratory experiments of chip level optical systems assembly.
Develop and manage setups for photonics and laser devices characterization.
Provide technical support to the R&D team for experiments and data analysis.
Contribute to the development of new testing methodologies and techniques.
Ensure adherence to experimental protocols and safety procedures.
Maintain laboratory equipment and supplies.

DustPhotonics is developing a cutting-edge technology in Silicon Photonics which is revolutionizing connectivity and communication in data centers. Silicon photonics is becoming a standard technology used for high performance systems, solving challenges of performance, integration, power and cost. This technology is growing rapidly also in other markets such as Healthcare, LIDARs and other sensors. At DustPhotonics, we are looking to solve the difficult problems, in a smart and simple way, by thinking out of the box, leveraging the knowledge and know-how of the team members, and work as team to create Magic. Our Company culture is characterized by accountability for our ethics, for being fair to every employee, customer, supplier and partner. We believe we must work hard and have fun on the way to success. We welcome you to join our team - Apply for your next career opportunity with us! We are looking for a Silicon Engineering Manager Job description As the Silicon Engineering Manager you will be responsible for improving silicon-photonics yield and performance through data-driven analysis, cross-functional collaboration and proactive issue resolution. You will serve as the key interface between R&D, Process and Production teams, ensuring efficient data flow, rapid issue identification and continuous process improvement across wafer fabrication, device testing, and packaging stages.

Responsibilities:

* Perform silicon process and chip-level data analysis, establishing correlation between chip and wafer performance.
* Lead process debug and yield loss analysis at chip/wafer level, driving root cause investigations and corrective actions.
* Manage engineering approval forum to release production material.
* Collaborate closely with vendors to implement new product tests and resolve technical/process issues.
* Act as a key interface between design, testing, and production teams, ensuring alignment across the product lifecycle
* Oversee and coordinate the transfer of data related to silicon design, testing, fabrication, and characterization between Production and R&D departments.
* Develop and implement data management strategies to ensure data accuracy, security, and accessibility.
* Maintain proper documentation of data transfer protocols, version control, and data integrity checks.
* Support data analysis efforts to improve silicon performance, yield, and quality.
* Ensure compliance with company policies and industry standards related to data security and confidentiality.

Hiring Manager:
Arie Faitelson

As a Quality and Reliability (Q&R) Engineer, you will lead the qualification and long-term reliability of advanced System-on-Chip (SoC) and RF semiconductor products for automotive applications. Youll work across digital and RF domains to ensure robust performance and compliance with industry standards.
What will your job look like:
Define and manage Quality and Reliability specifications, simulations, and qualification plans for SoC and RF die and package.
Plan and execute automotive-grade qualifications per standards such as AEC-Q100, JEDEC JESD22, and IATF 16949.
Design and implement die-level and package-level stress tests.
Select and prepare electrical, environmental, and mechanical test platforms for reliability testing.
Define requirements for Pre-Si Q&R (e.g. ESD, LU, EM, IR drop), Design-for-Test (DFT), electrical characterization, and Post-Si Q&R testing of digital, mixed-signal and RF SoCs.
Collaborate extensively with internal design teams, external subcontractors, and outsourcing partners (OSATs).
Lead failure analysis, reliability modeling, and corrective action processes (e.g., 8D, FMEA, FMEDA).
Document and certify automotive standards compliance, including PPAP/APQP deliverables.

We are seeking an experienced and visionary Head of Hardware Group to lead a multi-disciplinary hardware team (Digital, Mechanical, and RF). The role requires a strong technical background, proven leadership skills, and the ability to drive innovative, high-quality hardware solutions from concept to production. This position combines hands-on involvement with strategic management, ensuring the successful delivery of complex products in dynamic and demanding environments.
Principle Duties and Responsibilities:
Lead and manage a multi-disciplinary hardware group (Digital, Mechanical, and RF), including recruitment, mentoring, performance evaluation, and career development.
Define group strategy, methodologies, and KPIs to align with company goals.
Provide technical leadership in system architecture, design reviews, and troubleshooting complex challenges across domains.
Oversee the end-to-end product lifecycle: concept definition, system architecture, schematic design, PCB layout, mechanical design, integration, validation, and transition to production.
Drive innovation and adoption of new technologies, tools, and design methodologies.
Manage schedules, resources, and priorities to ensure timely delivery and budget compliance.
Build strong collaboration with FPGA, software, system engineering, validation, and operations teams.
Ensure compliance with product certifications and regulatory standards (CE, FCC, Mil-461, etc.).
Represent the HW group in executive management forums and in front of customers, partners, and subcontractors.
Establish a culture of ownership, accountability, and continuous improvement within the group.

Which department will you join? The SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You will manage a team of 5 engineers
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

Which department will you join? The SOC verification group owns the important and challenging job of verifying our company's chip. It is involved from product specification to final SOC delivery, and involves all the system components. The group is made up of few of the best verification engineers, so besides contributing to making our roads safer, youll get the chance to work at one of the most professional verification teams.
What will your job look like:
You will manage a team of 5 engineers
You'll be responsible for Pre-Silicon system-level verification of the most cutting-edge AI accelerators and technologies in the automotive field.
Define the TestPlan, develop and run tests on simulation/emulation environments, develop test environment and verification collaterals.
You'll have a broad effect on our unique product from the very beginning of the process.

We are a global company, a world leader in the pool cleaners industry. We are looking for a Hardware Engineer for design, development, implementation, verification, and validation Embedded electrical board and systems for the new generation of our robots and products. From the board design according to the system requirement thru the final product in the production line launching.

The EyeQ SoC Performance Modeling and Profiling team is part of the EyeQ Platform Group (EPG), working on both current and next-generation designs for ADAS (Advanced Driver-Assistance Systems) and Autonomous Vehicles (AV). Performance models and profiling tools are essential components of the EPG infrastructure they are used during the hardware architecture definition phase of the EyeQ chip and by software developers to optimize performance.
What will your job look like:
You will be part of team that develops EyeQ SoC Performance Modeling environment and emulators
You will work on SOC performance analysis and optimizations.
You will be running HW benchmarks, to measure HW performance and to calibrate the simulation environment to match the performance of the silicon board.
You will be working on HW performance analysis and tuning, and influence future company EyeQ SoC design.
You will have the opportunity to work on open-source simulation and profiling tools and adopt them to our company's needs.
You will work closely with HW architects and SW/Algorithms developers.

We are looking for a Compiler Performance Engineer.

In this role, you will be part of a highly motivated group of engineers dedicated to pushing compiler optimization technology to the next level. You will analyze diverse real-world workloads, including state-of-the-art applications and industry-standard benchmarks, to find opportunities to optimize the code taking advantage of micro-architectural features.
In this HW/SW co-design role, you will have the opportunity to influence the architecture and micro-architecture of future silicon.
You will also review and provide feedback on the work of your peers and collaborate with them on solutions to the problems they are working on. In this environment, you will continuously refine your expertise, explore new technologies, and engage in projects that bridge hardware and software teams.
Your contributions will have a direct impact on every application running on all devices, and your performance analysis will help guide the development of future platforms. If you believe you have additional skills not listed here that would make you a good candidate for this position, please feel free to include a cover letter describing those skills and their applicability to the position. If this is of interest to you, we'd love to hear from you!

We are looking for an excellent Firmware Design Engineer for our FW PHY Group. The person will closely work with our FW PHY development, architecture teams and gain a deep understanding of our Networking products and technologies. Love a good puzzle? If you are an outstanding problem solver who loves a good challenge and looking to expand your horizons, come join us!

What you'll be doing:

Work on developing the new PHY layer for the XDR (800G) InfiniBand and 1600G Ethernet Switch and NIC (network adapter) product lines.

Be responsible for designing, developing, and delivering new networking features, debugging real problems of FW PHY flows on customer setups.

Innovate! Bring our products to the next quality level.

We are looking for a talented Embedded SW Architect to be part of this exciting journey.

Responsibilities

Designing SW architecture of high complexity heterogeneous multi-core ASIC device.
Definition of the different SW layers of the system and their relations: data-path, control-path and management.
Analyze top to bottom functionality and SW slices - RTOS, kernel, firmware, drivers.
Designing the SW according to automotive known standards such as safety and security standards.
Recommend and influence the ASIC HW architecture - performance, usability and visibility.
Responsibility for the definition of SW sequences such as boot procedure, fail-safe scenarios and more.

We are looking for Product/ Critical Component Engineer. The position will have responsibility to enhance our growing field of high speed optical Interconnect products performance, cost and quality aspects.

What you'll be doing:

The candidate will be responsible for Critical component evaluation and introduction to our interconnect products.

The candidate will work with design, HW and process groups to improve or resolve critical components aspects.

New critical component Qualification and Reliability assessment.

Evaluate High speed performance and margins of the critical component.

Run DOEs and corners samples analysis to evaluate system level performance under different use scenarios.

Set automation tools and monitors to control critical components introduction to the manufacturing line.

Implement new screening methodologies to ensure MLNX quality standards.

Investigation of reliability issues at the CM and Customers sites.

As the worlds leading vendor of Cyber Security, facing the most sophisticated threats and attacks, weve assembled a global team of the most driven, creative, and innovative people. At our company, our employees are redefining the security landscape by meeting our customers real-time needs and providing our cutting-edge technologies and services to an ever-growing customer base.
our company Software Technologies has been honored by Time Magazine as one of the Worlds Best Companies for 2024. We've also earned a spot on the Forbes list of the Worlds Best Places to Work for five consecutive years (2020-2024) and recognized as one of the Worlds Top Female-Friendly Companies. If you're passionate about making the world a safer place and want to be part of an award-winning company culture, we invite you to join us.
our company Harmony Email Security and Collaboration (Previously AVANAN) is a unique email solution that fully secures cloud email and cloud platforms using AI.
Your Impact & Responsibilities
At our company, exceptional visual design is at the heart of our user experience. Were seeking a visionary design leader with strong creative range, a passion for digital innovation, and meticulous attention to detail. You should be excited to embrace and evolve modern design practicesespecially through the use of AI toolsand confident in driving outstanding user experiences in a fast-paced, technology-focused environment.
Key Responsibilities
Lead the UI design of complex, professional SaaS products and platforms
Translate UX strategies and creative briefs into high-fidelity, user-centered design mockups
Produce visually compelling designs that are consistent with brand identity across digital and print
Collaborate closely with UX designers, product managers, and developers to bring concepts to life
Create and maintain visual assets such as icons, UI patterns, illustrations, and infographics
Proactively identify opportunities to improve product usability and design, and lead initiatives to address them
Establish a distinctive and engaging visual language that enhances customer experience
Lead and mentor a team of designers and external contractors
Full-time position.

our product team is looking for a Senior Product Designer to lead the design of intuitive, user-centered product experiences. we are a platform that helps organizations strengthen their cybersecurity posture by assessing risks across their technology infrastructure, security processes, and business practices.
As a Senior Product Designer, you will work hand-in-hand with Product and R&D in an iterative, fast-paced development environment, helping shape an enterprise-grade suite of cybersecurity products.
As a Senior Product Designer, you will:
Lead end-to-end design of product featuresfrom early discovery and research to high-fidelity designs and implementation
Translate complex use cases into user-friendly, valuable solutions based on best practices
Collaborate closely with Product Managers, Engineers, and QA to define product strategy, shape the user experience, and ensure high-quality implementation
Use data, research, and user empathy to inform design decisions and iterate effectively
Create and maintain high-quality, scalable design deliverables in Figma
Develop wireframes, prototypes, visual designs, and interaction specs that clearly communicate design intent
Ensure visual and interaction consistency across the product by contributing to and maintaining our UX Design System
Support a strong, inclusive design culture through peer feedback and collaboration
Manage multiple projects and competing priorities in a fast-paced environment
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